Pixel circuit and display device having the same

    公开(公告)号:US11948510B2

    公开(公告)日:2024-04-02

    申请号:US18064813

    申请日:2022-12-12

    CPC classification number: G09G3/3233 G09G2300/0426 G09G2300/0809

    Abstract: A pixel circuit includes a first driving transistor including a gate electrode connected to a first node, a first electrode to receive a first power voltage, and a second electrode connected to a second node, a second driving transistor including a gate electrode and a second electrode connected to the second node, a first electrode to receive the first power voltage, and a back gate electrode connected to the first node, a write transistor including a first electrode to receive a data voltage and a second electrode connected to the first node, an initialization transistor including a gate electrode to receive an initialization gate signal, a first electrode to receive an initialization voltage, and a second electrode connected to the second node, a storage capacitor connected to the first and second nodes, and a light emitting element connected to the second node and configured to receive a second power voltage.

    Display device
    36.
    发明授权

    公开(公告)号:US11917872B2

    公开(公告)日:2024-02-27

    申请号:US16406243

    申请日:2019-05-08

    CPC classification number: H10K59/131 H01L27/1225 H10K59/1216

    Abstract: Provided is a display device including: a substrate having a display area and a peripheral area outside the display area; a first transistor and a second transistor each located over the display area of the substrate and arranged at different levels on the substrate; and a plurality of wirings located over the peripheral area of the substrate, wherein the plurality of wirings include first wirings and second wirings, the first wirings and the second wirings being located at different levels on the substrate and are alternately arranged with each other.

    Display device with voltage line contact

    公开(公告)号:US11737326B2

    公开(公告)日:2023-08-22

    申请号:US17209222

    申请日:2021-03-23

    CPC classification number: H10K59/131 H10K59/121

    Abstract: A display device includes a first active pattern disposed on a substrate, a first gate electrode disposed on the first active pattern, a second active pattern disposed on the first gate electrode, being electrically connected to the first gate electrode, and including an extension part extending in a first direction and a protrusion part protruding from the extension part in a second direction crossing the first direction, and a voltage line disposed on the second active pattern, extending in the first direction, and overlapping the protrusion part in an overlapping region. The voltage line contacts the protrusion part through a first contact, and the first contact entirely overlaps the overlapping region on a plane.

    DISPLAY APPARATUS
    39.
    发明申请

    公开(公告)号:US20230060062A1

    公开(公告)日:2023-02-23

    申请号:US17863913

    申请日:2022-07-13

    Abstract: A display apparatus includes a substrate including a display area and a peripheral area outside the display area, a common voltage supply line arranged in the peripheral area and including a first common voltage input part, a second common voltage input part, and a third common voltage input part between the first and second voltage input parts each arranged in a first edge of the display area, a first common voltage line extending from the third common voltage input part and crossing the display area in a first direction, a first data line extending in the first direction across the display area, a first data input line arranged in the peripheral area, and a first connection line connecting the first data input line to the first data line.

    DISPLAY PANEL
    40.
    发明申请

    公开(公告)号:US20220181354A1

    公开(公告)日:2022-06-09

    申请号:US17398236

    申请日:2021-08-10

    Abstract: A display panel includes a first thin-film transistor (“TFT”) arranged in a display area of a substrate and including a first semiconductor layer including a silicon semiconductor, a second TFT connected to the first TFT and including a second semiconductor layer including an oxide semiconductor, a voltage line connected to the first TFT, and a shield layer arranged between the substrate and the first semiconductor layer, and including a pattern and a connection line, the pattern overlapping the first semiconductor layer, the connection line extending from the pattern, and a voltage that is a same as a voltage applied to the voltage line being applied to the shield layer.

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