Abstract:
An organic light emitting diode display including: a substrate; a plurality of first signal lines on the substrate extending in a first direction; a first insulating layer covering the substrate and the first signal lines; a plurality of auxiliary signal lines formed on the first insulating layer and overlapping the first signal lines; a second insulating layer covering the auxiliary signal lines; a plurality of first signal line connecting members formed on the second insulating layer while overlapping parts of the auxiliary signal lines; a plurality of second signal lines crossing the first signal lines; a plurality of switching transistors and a plurality of driving transistors connected with the first signal lines and the second signal lines; and a plurality of organic light emitting diodes electrically connected to the driving transistors, where the first signal line connecting members connect the first signal lines to the auxiliary signal lines.
Abstract:
An organic light emitting diode display includes: a pixel region; and a peripheral region surrounding the pixel region, the peripheral region including: a gate common voltage line; an interlayer insulating film that covers the gate common voltage line and has a common voltage contact hole exposing part of the gate common voltage line; a data common voltage line that is formed on the interlayer insulating film and comes in contact with the gate common voltage line via the common voltage contact hole; barrier ribs that cover the data common voltage line and have common voltage openings exposing part of the data common voltage line; and a peripheral common electrode that is formed on the barrier ribs and comes in contact with the data common voltage line via the common voltage openings, wherein the barrier ribs are formed at positions corresponding to the boundaries with the common voltage contact hole.
Abstract:
A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the dock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage,
Abstract:
A method of manufacturing a display panel of an organic light emitting display device, where the display panel has a plurality of pixels, is disclosed. By the method, a plurality of pixel groups is determined by grouping the pixels of the display panel, respective resonance-efficiencies of the pixel groups are calculated based on respective distances between a power unit and the pixel groups, and the pixels of the display panel are formed according to the respective resonance-efficiencies of the pixel groups.
Abstract:
A display device according to an exemplary embodiment includes: a substrate including a display area and a transmission area; a metal blocking layer disposed in the display area of the substrate; an inorganic insulating layer disposed on the metal blocking film; a transistor disposed on the inorganic insulating layer; an emission layer connected to the transistor; and a light blocking layer and a color filter disposed on the emission layer of the display area, wherein the edge of the light blocking layer is protruded toward the transmission area more than the edge of the metal blocking layer.
Abstract:
A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.
Abstract:
A gate driver and a display device having the same are disclosed. In one aspect, the gate driver includes a plurality of stages configured to respectively output a plurality of gate output signals. An N-th stage includes a first input circuit configured to boost a first input signal to a first signal and transmit the first input signal to a first node. A second input circuit is configured to boost the first input signal to a second signal and transmit the fifth clock signal and a first direct current (DC) voltage to a second node. A stabilizing circuit is configured to boost a second input signal to a third signal, boost a second node signal to a fourth signal, and stabilize a first node signal. An initializing circuit is configured to initialize voltages at the first and second nodes and the first to fourth signals.
Abstract:
A method of driving an OLED display includes: during a scanning period of a first frame, turning off a relay transistor and turning on a switching transistor to enable a second data voltage applied to a data line to be stored in a first capacitor; and during a light emitting period of the first frame, performing an operation to turn on a light emitting transistor and a compensation transistor to enable a voltage into which a first data voltage and a threshold voltage of a driving transistor are reflected to be applied to a second node for enabling the OLED to emit light by a driving current which flows into a driving transistor. The scanning period and the light emitting period temporally overlap each other.
Abstract:
An emission driver and a display device having the same are disclosed. In one aspect, the emission driver includes a plurality of stages each configured to output an emission control signal, wherein each of the stages includes first and second driving blocks and a buffer block. The buffer block is configured to selectively output an emission control signal so as to operate in a sequential emission mode or in a simultaneous emission mode, the stages being configured to sequentially output a plurality of the emission control signals in the sequential emission mode and substantially simultaneously output the emission control signals in the simultaneous emission mode. The buffer block is further configured to determine a duration in which the emission control signal has a first voltage level based on an interval between time points when first and second intermediate signals have low voltage levels.
Abstract:
A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.