公开(公告)号：US20200321402A1

公开(公告)日：2020-10-08

申请号：US16813685

申请日：2020-03-09

Applicant: Samsung Display Co., Ltd.

Inventor： Byeongguk Jeon ,  Dong-Hyun Lee ,  Deok-Young Choi

IPC: H01L27/32 ,  G06F3/044

Abstract: An electronic panel may include a plurality of sensing electrodes and a plurality of sensing lines. The sensing lines may include a plurality of first group sensing lines and a plurality of second group sensing lines, which are spaced apart from each other in a specific direction and are alternately arranged with respect to each other. Each of the first group sensing lines and the second group sensing lines may include a first pattern layer and a second pattern layer, which are spaced apart from each other with an insulating layer interposed therebetween and are coupled to each other through the insulating layer. Each of the first group sensing lines may include a first pattern layer in a specific region, and each of the second group sensing lines may include a second pattern layer in the specific region.

公开(公告)号：US10147774B2

公开(公告)日：2018-12-04

申请号：US14307980

申请日：2014-06-18

Applicant: Samsung Display Co., Ltd.

Inventor： Byoung-Keon Park ,  Jong-Ryuk Park ,  Dong-Hyun Lee ,  Jin-Wook Seo ,  Ki-Yong Lee

IPC: H01L27/32 ,  H01L29/786 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L27/12 ,  H01L29/49 ,  H01L29/66

Abstract: A method of manufacturing a thin film transistor (TFT) comprises forming a buffer layer, an amorphous silicon layer, and an insulating layer on a substrate; crystallizing the amorphous silicon layer as a polycrystalline silicon layer; forming a semiconductor layer and a gate insulating layer which have a predetermined shape by simultaneously patterning the polycrystalline silicon layer and the insulating layer; forming a gate electrode including a first portion and a second portion by forming and patterning a metal layer on the gate insulating layer. The first portion is formed on the gate insulating layer and overlaps a channel region of a semiconductor layer, and the second portion contacts the semiconductor layer. A source region and a drain region are formed on the semiconductor layer by doping a region of the semiconductor layer. The region excludes the channel region overlapping the gate electrode and constitutes a region which does not overlap the gate electrode. An interlayer insulating layer is formed on the gate electrode so as to cover the gate insulating layer; contact holes are formed on the interlayer insulating layer and the gate insulating layer so as to expose the source region and the drain region, and simultaneously an opening for exposing the second portion is formed. A source electrode and a drain electrode are formed by patterning a conductive layer on the interlayer insulating layer. The source electrode and the drain electrode are electrically connected to the source region and the drain region via the contact holes, and simultaneously the second portion exposed via the opening is removed.

公开(公告)号：US09257288B2

公开(公告)日：2016-02-09

申请号：US14022126

申请日：2013-09-09

Applicant: Samsung Display Co., LTD.

Inventor： Maidanchuk Ivan ,  Byung-Soo So ,  Dong-Hyun Lee ,  Won-Pil Lee

IPC: H01L21/66 ,  H01L21/268 ,  H01L21/00 ,  H01L21/02

CPC classification number: H01L21/268 ,  H01L21/02532 ,  H01L21/02667 ,  H01L22/12

Abstract: A method and system for monitoring crystallization of an amorphous silicon (a-Si) thin film, and a method of manufacturing a thin film transistor (TFT) by using the method and system are disclosed. The method of monitoring the crystallization of the a-Si thin film includes: irradiating light from a light source onto a monitoring a-Si thin film to anneal the monitoring a-Si thin film; annealing the monitoring a-Si thin film and concurrently measuring a Raman scattering spectrum of light scattered by the monitoring a-Si thin film at set time intervals; and calculating a crystallization characteristic value of the monitoring a-Si thin film based on the Raman scattering spectrum.

Abstract translation: 公开了一种用于监测非晶硅（a-Si）薄膜的结晶的方法和系统，以及通过使用该方法和系统制造薄膜晶体管（TFT）的方法。 监测a-Si薄膜结晶的方法包括：将来自光源的光照射到监测a-Si薄膜上，使监测a-Si薄膜退火; 对监测的a-Si薄膜进行退火，同时测量由监测a-Si薄膜以设定的时间间隔散射的光的拉曼散射光谱; 并基于拉曼散射光谱计算监测a-Si薄膜的结晶特征值。