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公开(公告)号:US11748590B2
公开(公告)日:2023-09-05
申请号:US17247647
申请日:2020-12-18
Applicant: NXP B.V.
Inventor: Thomas Pichler , Ivan Jesus Rebollo Pimentel
IPC: G06K19/07 , G06K19/077
CPC classification number: G06K19/0726 , G06K19/0724 , G06K19/07756 , G06K19/07786
Abstract: A Radio Frequency Identification (RFID) tag is disclosed. The RFID tag includes an antenna to receive a high frequency signal, a capacitor bank coupled with the antenna, a charge pump coupled with the antenna configured to convert the high frequency signal to a direct current (DC) signal, an envelope detector to measure peak voltage of the high frequency signal and a detector to compare an output of the charge pump and an output of the envelope detector. The RFID tag also includes an impedance tuning circuit coupled with the charge pump and the envelope detector configured change a capacitance of the capacitor bank based on an output of the detector and the envelope detector.
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公开(公告)号:US20230135571A1
公开(公告)日:2023-05-04
申请号:US17453218
申请日:2021-11-02
Applicant: NXP B.V.
Inventor: Ivan Jesus Rebollo Pimentel , Thomas Pichler , Ronald van Langevelde
Abstract: A voltage regulator is provided. The voltage regulator includes a shunt transistor and a feedback circuit. The shunt transistor has a first current electrode coupled to a first voltage source terminal, a second current electrode coupled to a second voltage source terminal, a control electrode coupled to receive a reference voltage, and a body electrode. The feedback circuit has an input terminal coupled to the body electrode of the shunt transistor, and an output terminal coupled to the control electrode of the shunt transistor. The voltage regulator is suitable for use in a passive RFID device to protect the device from over-voltage damage. In another embodiment, a method for regulating a voltage is provided.
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公开(公告)号:US20220383060A1
公开(公告)日:2022-12-01
申请号:US17303487
申请日:2021-05-29
Applicant: NXP B.V.
Inventor: Thomas Pichler , Ivan Jesus Rebollo Pimentel
IPC: G06K19/07 , G06K19/073
Abstract: A Radio Frequency Identification (RFID) tag is disclosed. The RFID tag includes an antenna port to receive an input AC signal and a hybrid limiter including a clamping device configured to limit a voltage of the input AC signal to a preconfigured limit. The hybrid limiter is configured to provide a stable ground reference for the clamping device.
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公开(公告)号:US20220215222A1
公开(公告)日:2022-07-07
申请号:US17247997
申请日:2021-01-04
Applicant: NXP B.V.
Inventor: Thomas Pichler , Ivan Jesus Rebollo Pimentel
IPC: G06K19/077 , H02M3/07 , G06K19/07
Abstract: A ground switch is disclosed. The ground switch includes an antenna port, a pair of switching devices coupled with the antenna port and a charge pump coupled with the pair of devices and configured to turn on/off the pair of devices based on an AC input signal received through the antenna port and a DC offset voltage added to the AC input signal. The ground switch further includes a clamping circuit to clamp an output of the charge pump. The ground switch is configured to provide a stable ground to components of devices such that a radio frequency identification (RFID) device.
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公开(公告)号:US20220198237A1
公开(公告)日:2022-06-23
申请号:US17247650
申请日:2020-12-18
Applicant: NXP B.V.
Inventor: Thomas Pichler , Ivan Jesus Rebollo Pimentel , Christian Weidinger , Franz Amtmann , Werner Zettler , Heinz Umfahrer
IPC: G06K19/077 , G06K7/10
Abstract: A Radio Frequency Identification (RFID) tag is disclosed. The RFID tag includes an antenna to receive an input AC signal and a tuning system coupled with the antenna to optimize signal strength of the input AC signal. The tuning system includes a charge pump rectifier. A diode rectifier is included and is coupled with the antenna to receive the input AC signal after the tuning system optimizes the signal strength by tuning input impedance of the antenna.
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公开(公告)号:US20220164618A1
公开(公告)日:2022-05-26
申请号:US17451886
申请日:2021-10-22
Applicant: NXP B.V.
Inventor: Thomas Pichler , Ivan Jesus Rebollo Pimentel
IPC: G06K19/07 , G06K19/077 , H02M3/07
Abstract: There is described a rectifier circuit for providing and limiting a supply voltage to an RFID tag, the circuit including a pair of antenna input terminals configured to receive an input signal from an RFID tag antenna. A plurality of charge pump stages are coupled in cascade in such a way that an input terminal of a first charge pump stage in the cascade is connected to ground and an input terminal of each subsequent charge pump stage in the cascade is coupled to an output terminal of the preceding charge pump stage in the cascade. A control logic is configured to select the output terminal of one charge pump stage among the plurality of charge pump stages to provide the supply voltage. Furthermore, an RFID tag and a method of providing and limiting a supply voltage to an RFID tag are described.
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公开(公告)号:US11321600B1
公开(公告)日:2022-05-03
申请号:US17303488
申请日:2021-05-29
Applicant: NXP B.V.
Inventor: Thomas Pichler , Ivan Jesus Rebollo Pimentel
IPC: G06K19/07 , G06K19/077
Abstract: A Radio Frequency Identification (RFID) tag is disclosed. The RFID tag includes an antenna port to receive an input AC signal and a self-tuning circuit coupled with the antenna port to optimize signal strength of the input AC signal during a self-tuning phase. The RFID tag further includes an AC limiter configured to limit the voltage of the input AC signal to a preconfigured limit and a limiter controller configured to disable the AC limiter during the self-tuning phase and re-enable the AC limiter after the self-tuning phase. The self-tuning phase occurs prior to the data communication period in which the data stored in the RFID tag is transmitted back to a reader.
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公开(公告)号:US20220027581A1
公开(公告)日:2022-01-27
申请号:US17305071
申请日:2021-06-30
Applicant: NXP B.V.
Inventor: Thomas Pichler , Ivan Jesus Rebollo Pimentel
Abstract: In accordance with a first aspect of the present disclosure, a radio frequency identification (RFID) transponder is provided, comprising: a receiver configured to receive a command from an external RFID reader, wherein the command is a first command transmitted by the RFID reader during a communication session and wherein said command comprises a at least one parameter indicative of one or more modifiable settings of the RFID transponder; and a controller configured to modify the settings of the RFID transponder in accordance with a value of said parameter. In accordance with a second aspect of the present disclosure, a corresponding method of operating a radio frequency identification (RFID) transponder is conceived.
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公开(公告)号:US10929739B2
公开(公告)日:2021-02-23
申请号:US16552578
申请日:2019-08-27
Applicant: NXP B.V.
Inventor: Gerhard Martin Landauer , Ivan Jesus Rebollo Pimentel
IPC: G06K19/00 , G06K19/073 , G06K19/077 , G06K19/07
Abstract: A system for detecting tampering with a product includes a capacitor in or attached to the product, an integrated circuit configured to inject a current the capacitor and to detect a corresponding voltage slope on the capacitor. The integrated circuit is further configured to divide the voltage slope into a plurality of slope segments, discard a first set of slope segments, whose slope value falls outside a predefined range of slope values, and use a second set of slope segments, whose slope value falls within said predefined range, for determining a capacitance on the capacitor. A corresponding method for detecting tampering with a product is conceived, and a corresponding computer program is provided.
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公开(公告)号:US10585446B2
公开(公告)日:2020-03-10
申请号:US15887998
申请日:2018-02-03
Applicant: NXP B.V.
Inventor: Ivan Jesus Rebollo Pimentel , Gerhard Martin Landauer
Abstract: A reference voltage generator circuit (100) is disclosed, comprising a first transistor (101) having a first channel type and a second transistor (102) having a second channel type. A current source (104) is connected to a source terminal of the first transistor (101). A drain terminal of the second transistor (102) is connected to a drain terminal of the first transistor (101). The reference voltage generator circuit (100) further comprises a third transistor (103) having the second channel type, wherein a drain terminal of the third transistor (103) is connected to a source terminal of the second transistor (102). A node between the source terminal of the second transistor (102) and the drain terminal of the third transistor (103) is connected to a gate terminal of the first transistor (101). A connection for a reference voltage (Vrc) is provided between the current source (104) and the source terminal of the first transistor (101).
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