Abstract:
Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a solid state photomultiplier may include a plurality of pixels, wherein each pixel of the plurality of pixels comprises a plurality of subpixels; and a first set of buffer amplifiers, wherein each buffer amplifier of the first set of buffer amplifiers is respectively coupled to a subpixel of the plurality of subpixels.
Abstract:
Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a solid state photomultiplier may include an epitaxial layer, a high voltage region formed in the epitaxial layer, a low voltage region formed in the epitaxial layer, and an intermediate region disposed between the high voltage region and low voltage region, wherein the high voltage region is electrically coupled to the low voltage region via the intermediate region, and wherein at least a portion of the epitaxial layer is disposed between the high voltage region and intermediate region and between the low voltage region and the intermediate region.
Abstract:
Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a photosensor may include a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics. In some embodiments, a solid state photomultipler may include a microcell having; a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics.
Abstract:
A silicon photomultiplier array of microcells including a photon avalanche diode and an electronic circuit configured to provide a first one-shot pulse and a second one-shot pulse based on a detected current flowing through the photon avalanche diode. The microcells arranged in rows and columns with each microcell of a respective row connected to a respective row data bus connected to a row counter configured to count one or more first one-shot pulses for a predetermined time period, a pixel adder configured to sum the count, and a digital-to-analog converter connected to the pixel adder to convert sum to an analog signal representative of an energy readout. A timing logic circuit configured to provide a validation signal to a counter control logic circuit, and the counter control logic circuit configured to provide one of a start signal, a stop signal, and a reset signal to the row counter.
Abstract:
A silicon photomultiplier includes a plurality of microcells providing a pulse output in response to an incident radiation, each microcell including circuitry configured to enable and disable the pulse output. Each microcell includes a cell disable switch. The control logic circuit controls the cell disable switch and a self-test circuit. A microcell's pulse output is disabled when the cell disable switch is in a first state. A method for self-test calibration of microcells includes providing a test enable signal to the microcells, integrating dark current for a predetermined time period, comparing the integrated dark current to a predetermined threshold level, and providing a signal if above the predetermined threshold level.
Abstract:
Exemplary embodiments are directed to characterizing a solid state photomultiplier (SSPM). The SSPM can be exposed to a light pulse that triggers a plurality of microcells of the SSPM and an output signal of the SSPM generated in response to the light pulse can be processed. The output signal of the SSPM can be proportional to a gain of the SSPM and a quantity of microcells in the SSPM and a value of an electrical parameter of the SSPM can be determined based on a relationship between the output signal of the SSPM and an over voltage applied to the SSPM.
Abstract:
Photomultipliers are disclosed which comprise circuitry for detecting photo electric events and generating short digital pulses in response. In one embodiment, the photomultipliers comprise solid state photomultipliers having an array of microcells. The microcells, in one embodiment, in response to incident photons, generate a digital pulse signal having a duration of about 2 ns or less.
Abstract:
Exemplary embodiments are directed to shaping a readout pulse from a solid state photomultiplier (SSPM). A readout pulse can be received from the SSPM at an input of a buffer amplifier. The readout pulse can have a discharge portion with a discharge rate and a recharge portion with a recharge rate. A magnitude of the readout pulse increasing for the discharge portion and decreasing for the recharge portion. A frequency dependent input impedance circuit can be employed in electrical communication with the input of the buffer amplifier to shape the discharge portion of the readout pulse.
Abstract:
A multichannel application specific integrated circuit (ASIC) for interfacing with an array of photodetectors in a positron emission tomography (PET) imaging system includes a front end circuit configured to be coupled to the photodetectors and to receive discrete analog signals therefrom. The ASIC further includes a time discriminating circuit operably coupled to the front end circuit and configured to generate a hit signal based on a combination of the discrete analog signals, and an energy discriminating circuit operably coupled to the front end circuit and configured to generate a summed energy output signal based on each of the discrete analog signals and summed row and column output signals based on each of the discrete analog signals. The summed energy output signal represents an energy level of the detected radiation in the array of photodetectors, and the summed row and column output signals represent a location of the detected radiation.