公开(公告)号：US07675576B2

公开(公告)日：2010-03-09

申请号：US11164066

申请日：2005-11-09

Applicant: Cheng-Shun Liao ,  Chia-Pei Chang ,  Yi-Shu Chang ,  Ming-Chun Chang

Inventor： Cheng-Shun Liao ,  Chia-Pei Chang ,  Yi-Shu Chang ,  Ming-Chun Chang

IPC: H04N7/00 ,  H04N11/00 ,  H04N5/50 ,  H04N9/76

CPC classification number: H04N21/4884 ,  H04N5/44504 ,  H04N9/641 ,  H04N21/23614 ,  H04N21/4348

Abstract: A video processing apparatus includes: a line-based data encoder for performing line-based data encoding on an input signal to generate a line-based data encoded signal; and a video signal controller coupled to the line-based data encoder for receiving a first video signal and the line-based data encoded signal, decoding the line-based data encoded signal to generate a second video signal, and choosing one of the first and second video signals to generate an output signal.

Abstract translation: 视频处理装置包括：基于行的数据编码器，用于对输入信号执行基于行的数据编码，以生成基于行的数据编码信号; 以及视频信号控制器，其耦合到所述基于线路的数据编码器，用于接收第一视频信号和所述基于线路的数据编码信号，对所述基于线的数据编码信号进行解码以产生第二视频信号，以及选择所述第一和 第二视频信号以产生输出信号。

公开(公告)号：US07636131B2

公开(公告)日：2009-12-22

申请号：US11161847

申请日：2005-08-18

Applicant: Ming-Jane Hsieh ,  Yi-Shu Chang ,  Te-Ming Kuo

Inventor： Ming-Jane Hsieh ,  Yi-Shu Chang ,  Te-Ming Kuo

IPC: H04N9/64 ,  G09G5/00 ,  G06F12/02

CPC classification number: H04N5/44508 ,  H04N5/4401 ,  H04N5/45 ,  H04N21/42646 ,  H04N21/4316 ,  H04N21/4347

Abstract: A video data displaying device is disclosed. The video data displaying device is used to drive a displayer according to a first display data set to display a first picture, the displaying device comprises a memory for storing the first display data set, and a display engine which is electrically connected to the memory for storing a part of the first display data set stored in the memory, wherein the display engine selects a specific display data set from the first display data set according to a display area of the displayer, and the display engine does not output the specific display data to the displayer.

Abstract translation: 公开了一种视频数据显示装置。 视频数据显示装置用于根据第一显示数据集来驱动显示器以显示第一图像，显示装置包括用于存储第一显示数据组的存储器，以及电连接到存储器的显示引擎， 存储存储在存储器中的第一显示数据组的一部分，其中显示引擎根据显示器的显示区域从第一显示数据组中选择特定显示数据集，并且显示引擎不输出特定显示数据 到显示器。

公开(公告)号：US07583323B2

公开(公告)日：2009-09-01

申请号：US11162575

申请日：2005-09-15

Applicant: Yi-Shu Chang ,  Zou-Ping Chen ,  Tsung-Chi Lin ,  Cheng-Shun Liao

Inventor： Yi-Shu Chang ,  Zou-Ping Chen ,  Tsung-Chi Lin ,  Cheng-Shun Liao

IPC: H04N1/393 ,  H04N9/74

CPC classification number: G06T3/4015

Abstract: An image scaling method for calculating a pixel value of a target pixel within a scaled image block is disclosed. The method includes selecting a plurality of reference pixels from the image block, wherein each reference pixel has a pixel value and corresponds to a transparency parameter; respectively setting a corresponding weight value for each reference pixel; adjusting the weight values according to the transparency parameters of the reference pixels; and blending the pixel values of the reference pixels to generate the pixel value of the target pixel according to the adjusted weight values of the reference pixels.

Abstract translation: 公开了一种用于计算缩放图像块内的目标像素的像素值的图像缩放方法。 该方法包括从图像块中选择多个参考像素，其中每个参考像素具有像素值并对应于透明度参数; 分别为每个参考像素设置相应的权重值; 根据参考像素的透明度参数调整权重值; 以及混合参考像素的像素值，以根据所调整的参考像素的权重值来生成目标像素的像素值。

公开(公告)号：US07310400B2

公开(公告)日：2007-12-18

申请号：US10117046

申请日：2002-04-08

Applicant: Yi-Shu Chang

Inventor： Yi-Shu Chang

IPC: H03D3/24 ,  H04L7/02 ,  H04L7/00 ,  H04J3/06

CPC classification number: H04L7/0337 ,  H03L7/06

Abstract: A data recovery device. The device adjusts a digital signal according to a pulse signal output by a phase-locked loop circuit. The sampling circuit samples each bit of the digital signal five times to generate a first sampled signal. The data delay buffer decides a sampling range of the first sampled signal and outputs a second sampled signal. The sampling range selector picks a part of bits of the second sampled signal and outputs output data. The weighted detecting module outputs a phase shifting signal responding to the output data. The first loop filter outputs a first adjusting signal. The first sampling window module outputs a phase selecting signal. The second loop filter outputs the recovery signal and a second adjusting signal. The second sampling window module outputs the first phase checking signal and the second phase checking signal. The phase picking module outputs the output data.

Abstract translation: 数据恢复装置。 该装置根据由锁相环电路输出的脉冲信号调整数字信号。 采样电路对数字信号的每一位进行五次采样以产生第一采样信号。 数据延迟缓冲器决定第一采样信号的采样范围并输出第二采样信号。 采样范围选择器选择第二采样信号的一部分位并输出输出数据。 加权检测模块响应于输出数据输出相移信号。 第一个环路滤波器输出第一个调整信号。 第一采样窗口模块输出相位选择信号。 第二环路滤波器输出恢复信号和第二调整信号。 第二采样窗口模块输出第一相位检测信号和第二相位检测信号。 相位选择模块输出输出数据。

公开(公告)号：US07249275B2

公开(公告)日：2007-07-24

申请号：US10933896

申请日：2004-09-03

Applicant: Wen-Shiung Weng ,  Chi-Kung Kuan ,  Sheng-Kai Chen ,  Ming-Chun Chang ,  Yi-Shu Chang

Inventor： Wen-Shiung Weng ,  Chi-Kung Kuan ,  Sheng-Kai Chen ,  Ming-Chun Chang ,  Yi-Shu Chang

IPC: G06F1/10

CPC classification number: G06F1/08

Abstract: A clock tuning device and method for executing overclocking operations on plural elements disposed on a motherboard. The clock tuning device includes a phase-locked loop for outputting a plurality of clock signals to the elements, and a control circuit for controlling the phase-locked loop to adjust the frequencies of the clock signals, so as to execute the overclocking operations on the elements, respectively. The method includes the steps of: increasing the frequency of a first clock signal until one of the elements can't work normally due to an utmost frequency of the first clock signal; resetting all the elements and operating the element corresponding to the first signal according to a safe frequency of the first clock signal; and repeating the above steps to perform overclocking operation on each of the other elements.

Abstract translation: 一种用于对设置在母板上的多个元件执行超频操作的时钟调谐装置和方法。 时钟调谐装置包括用于向元件输出多个时钟信号的锁相环，以及用于控制锁相环以调整时钟信号的频率的控制电路，以便对该时钟信号执行超频操作 元素。 该方法包括以下步骤：增加第一时钟信号的频率，直到其中一个元件由于第一时钟信号的最大频率而不能正常工作; 根据第一时钟信号的安全频率，复位所有元件并对与第一信号相对应的元件进行操作; 并重复上述步骤对每个其他元件执行超频操作。

公开(公告)号：US07106118B2

公开(公告)日：2006-09-12

申请号：US11035088

申请日：2005-01-13

Applicant: Sen-Huang Tang ,  Yi-Shu Chang

Inventor： Sen-Huang Tang ,  Yi-Shu Chang

IPC: G06F1/04

CPC classification number: G06F1/04

Abstract: The invention is related to a method and an apparatus for generating an output clock. The method comprises: measuring a reference clock according to a free-run clock to produce a counter signal in a normal mode; suspending the reference clock; and generating the output clock according to the counter signal and the free-run clock in a power-saving mode.

Abstract translation: 本发明涉及一种用于产生输出时钟的方法和装置。 该方法包括：根据自由运行时钟测量参考时钟以产生正常模式的计数器信号; 暂停参考时钟; 以及在省电模式下根据计数器信号和自由运行时钟产生输出时钟。

公开(公告)号：US20060038921A1

公开(公告)日：2006-02-23

申请号：US11161819

申请日：2005-08-17

Applicant: Ming-Jane Hsieh ,  Yi-Shu Chang ,  Te-Ming Kuo ,  Shi-Wei Chen

Inventor： Ming-Jane Hsieh ,  Yi-Shu Chang ,  Te-Ming Kuo ,  Shi-Wei Chen

IPC: H04N5/445

CPC classification number: H04N5/45 ,  H04N5/4401 ,  H04N5/44508 ,  H04N21/42646 ,  H04N21/4316 ,  H04N21/4347

Abstract: A video processing method utilized in a video data processing device for processing video data is disclosed. The video data includes at least a first video data set, and the video data processing device has a memory and a video decoder. The method includes utilizing the video decoder to decode the video data for generating a display data set, driving the video decoder to select a specific video data set from the first video data set wherein the display data set does not have display data corresponding to the specific video data set, and utilizing the memory to store the display data.

Abstract translation: 公开了用于处理视频数据的视频数据处理装置中使用的视频处理方法。 视频数据至少包括第一视频数据组，并且视频数据处理装置具有存储器和视频解码器。 该方法包括利用视频解码器来解码用于产生显示数据集的视频数据，驱动视频解码器从第一视频数据集中选择特定的视频数据集，其中显示数据集不具有对应于具体的显示数据的显示数据 视频数据集，并利用存储器来存储显示数据。