LIGHT-EMITTING SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND LIGHT-EMITTING APPARATUS

    公开(公告)号:US20240164179A1

    公开(公告)日:2024-05-16

    申请号:US17918630

    申请日:2021-11-23

    CPC classification number: H10K59/80522 H10K59/1201

    Abstract: A light-emitting substrate includes: a substrate; and at least one coupling portion and at least one auxiliary cathode pattern disposed on the substrate. Each auxiliary cathode region is provided with a coupling portion and an auxiliary cathode pattern coupled to the coupling portion. The auxiliary cathode pattern includes at least one disconnection portion, and each disconnection portion includes first, second and third conductive pattern layers. An orthographic projection of an edge of the second conductive pattern layer on the substrate is located within orthographic projections of edges of the third and first conductive pattern layers on the substrate. A total perimeter of at least one orthographic projection, on the substrate, of at least one edge of at least one third conductive pattern layer in the at least one disconnection portion is greater than a perimeter of an orthographic projection of an edge of the auxiliary cathode region on the substrate.

    SHIFT REGISTER UNIT AND DRIVE METHOD THEREOF, SHIFT REGISTER AND DISPLAY APPARATUS

    公开(公告)号:US20190012976A1

    公开(公告)日:2019-01-10

    申请号:US15750417

    申请日:2017-08-14

    Abstract: The present disclosure provides a shift register unit, which includes an input circuit, a reset circuit, a noise reduction circuit, and an output circuit. The input circuit is configured to control a voltage of a first node based on a first input signal and a second input signal, and control a voltage of a second node based on a first voltage and the voltage of the first node. The reset circuit is configured to reset the voltage of the first node and the voltage of the second node. The noise reduction circuit is configured to maintain a reset voltage of the first node and a reset voltage of the second node. The output circuit is configured to provide, for an output terminal of the output circuit, a second clock signal from a second clock signal terminal or the second voltage. The shift register unit is composed of switch elements.

    BACKLIGHT MODULE AND DISPLAY DEVICE HAVING THE SAME

    公开(公告)号:US20190011778A1

    公开(公告)日:2019-01-10

    申请号:US15750319

    申请日:2017-07-17

    Inventor: Wei FENG Yang ZHANG

    Abstract: Disclosed are a backlight module and a display device having the same. The backlight module includes an optical assembly including a light guide plate, a plastic frame and an optical film disposed on a light-emitting side of the light guide plate. The plastic frame includes a side wall and a bearing portion formed on the top of the side wall of plastic frame and located on the light-emitting side of the light guide plate, the side wall of plastic frame is arranged to surround the light guide plate, the bearing portion extends from the top of the side wall of plastic frame to the light guide plate, and a side surface of the bearing portion faces a side surface of the optical film. The backlight module according to the disclosure can reduce the optical retardation of the display device, thereby reducing the dark-state light leakage of the display device.

    EDP INTERFACE AND CONTROL METHOD OF TRANSMISSION RATE OF EDP INTERFACE
    40.
    发明申请
    EDP INTERFACE AND CONTROL METHOD OF TRANSMISSION RATE OF EDP INTERFACE 有权
    EDP​​接口的EDP接口和传输速率控制方法

    公开(公告)号:US20150316951A1

    公开(公告)日:2015-11-05

    申请号:US14677117

    申请日:2015-04-02

    Abstract: The present invention discloses an eDP interface, including: a determination module, a clock signal generating module, a clock signal adjusting module, a first eDP data processing chip and a second eDP data processing chip. When the determination module determines that a target transmission rate is not equal to a protocol rate, the clock signal generating module generates a first clock signal and a second clock signal. The clock signal adjusting module adjusts the frequency of the second clock signal. The first and second eDP data processing chips process data according to the first and second clock signals, respectively.

    Abstract translation: 本发明公开了一种eDP接口,包括:确定模块,时钟信号产生模块,时钟信号调整模块,第一eDP数据处理芯片和第二eDP数据处理芯片。 当确定模块确定目标传输速率不等于协议速率时,时钟信号产生模块产生第一时钟信号和第二时钟信号。 时钟信号调整模块调节第二时钟信号的频率。 第一和第二eDP数据处理芯片分别根据第一和第二时钟信号处理数据。

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