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公开(公告)号：US11570877B2
公开(公告)日：2023-01-31
申请号：US17132510
申请日：2020-12-23
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan Xu , Yongqian Li , Guoying Wang , Dacheng Zhang , Lang Liu
Abstract: A display panel and a display apparatus are disclosed. The display panel comprises: a plurality of signal lines extending in a first direction; at least one first reference voltage bus which extends in a second direction intersecting the first direction; and a plurality of electrostatic discharge units divided into a plurality of electrostatic discharge unit groups, wherein the plurality of electrostatic discharge unit groups are arranged in the second direction and each of the plurality of electrostatic discharge unit groups comprises at least two electrostatic discharge units arranged in the first direction, wherein at least one of the plurality of signal lines is electrically connected to the first reference voltage bus through at least one of the plurality of electrostatic discharge units.
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公开(公告)号：US11568820B2
公开(公告)日：2023-01-31
申请号：US16966205
申请日：2020-01-20
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/3233 , G11C19/28
Abstract: A display panel, a display device, and a drive method are provided. The display panel includes a plurality of sub-pixel units arranged in an array and a gate drive circuit, and the array includes N rows. The gate drive circuit includes a plurality of cascaded shift register units and N+1 output terminals arranged in sequence, each of the plurality of cascaded shift register units is configured to output a gate scan signal for driving at least two rows of sub-pixel units in the N rows of the array to work; pixel drive circuits of an (n)-th row of sub-pixel units are connected to an (n)-th output terminal of the gate drive circuit to receive the gate scan signal as a scan drive signal, and sensing circuits of the (n)-th row of sub-pixel units are connected to an (n+1)-th output terminal of the gate drive circuit.
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公开(公告)号：US11568791B2
公开(公告)日：2023-01-31
申请号：US17279478
申请日：2020-05-25
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/32 , G09G3/20 , G11C19/28 , G09G3/3266
Abstract: The present disclosure discloses a shift register, a gate driving circuit and a display device. The shift register includes a display pre-charge reset circuit, a sensing cascade circuit, a sensing pre-charge reset circuit, a pull-down control circuit and an output circuit, where the display pre-charge reset circuit, the sensing cascade circuit and the sensing pre-charge reset circuit share the same pull-down control circuit and the same output circuit, the output circuit is coupled to at least one signal output terminal, the output circuit includes output sub-circuits in one-to-one correspondence with the at least one signal output terminal, and each output sub-circuit is configured to write a driving clock signal into the corresponding signal output terminal in a display output stage and a sensing output stage in response to a control of a voltage of a pull-up node in an effective level state.
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34.发明授权公开(公告)号：US11538416B2
公开(公告)日：2022-12-27
申请号：US17261652
申请日：2020-04-07
Inventor： Xuehuan Feng , Yongqian Li
IPC: G11C19/00 , G09G3/3266 , G09G3/20 , G09G3/36 , G11C19/28
Abstract: A shift register circuit includes a first input sub-circuit, an output sub-circuit and an output control sub-circuit. The first input sub-circuit transmits a signal received at a second signal input terminal to a pull-up node. The output sub-circuit transmits a signal received at a first clock signal terminal to a shift signal output terminal, and transmits a signal received at an output signal transmission terminal to a first scan signal output terminal. The output control sub-circuit transmits a signal received at a chamfering signal terminal to the first scan signal output terminal in a predetermined time before the first scan signal output terminal stops outputting the signal from the output signal transmission terminal. The chamfering signal terminal transmits a signal with a voltage amplitude within a variation range of a voltage amplitude of a signal of the first scan signal output terminal.
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公开(公告)号：US11482582B2
公开(公告)日：2022-10-25
申请号：US17280316
申请日：2020-05-15
Inventor： Meng Li , Zhongyuan Wu , Yongqian Li , Dacheng Zhang , Jingquan Wang , Yu Wang , Chen Xu
IPC: H01L27/32 , G09G3/3225 , H01L27/12
Abstract: The present disclosure provides a display panel and an electronic device. The display panel includes: a base substrate; and a pixel arranged on the base substrate, wherein the pixel includes a first sub-pixel including a first sub-pixel drive circuit and a first light emitting element and a second sub-pixel including a second sub-pixel drive circuit and a second light emitting element, the first and second sub-pixel drive circuits are arranged sequentially in a first direction and extend in a second direction, wherein the first light emitting element includes a first anode, the second light emitting element includes a second anode, an orthographic projection of each of the first and the second anodes partially covers an orthographic projections of the first and second sub-pixel drive circuits, and the orthographic projection of the first anode does not overlap the orthographic projection of the second anode.
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Patent Agency Ranking
公开(公告)号：US11450252B2
公开(公告)日：2022-09-20
申请号：US16478395
申请日：2018-12-21
Inventor： Xuehuan Feng , Yongqian Li
Abstract: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output an output blanking output control signal; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal; a selection sub-circuit, having a first terminal connected to the second input sub-circuit, a second terminal connected to the first input sub-circuit, and a third terminal connected to a first node, configured to control a potential of the first node according to the display output control signal and the blanking output control signal; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node.
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公开(公告)号：US11424294B2
公开(公告)日：2022-08-23
申请号：US16963629
申请日：2019-09-10
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
IPC: H01L29/08 , H01L27/32 , G09G3/3258
Abstract: A display panel and a display device are disclosed. The display panel includes a plurality of sub-pixel units arranged in an array which includes N rows and 4M columns, sub-pixel units in each row is divided into a plurality of sub-pixel unit groups, and each sub-pixel unit group includes a first sub-pixel unit, a second sub-pixel unit, a third sub-pixel unit and a fourth sub-pixel unit which are sequentially in four adjacent columns along a first direction.
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公开(公告)号：US20220238062A1
公开(公告)日：2022-07-28
申请号：US17721234
申请日：2022-04-14
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
IPC: G09G3/20
Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit and the second input circuit have a same circuit structure.
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公开(公告)号：US11361693B2
公开(公告)日：2022-06-14
申请号：US16633965
申请日：2019-07-10
Inventor： Xuehuan Feng , Yongqian Li
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes a first input circuit, an output control circuit, and an output circuit. The first input circuit is configured to output a first input signal to a first node in response to a first control signal; the output control circuit is configured to output an output control signal to a second node under control of a level of the first node; and the output circuit includes an output terminal, and the output circuit is configured to output an output signal to the output terminal under control of a level of the second node.
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公开(公告)号：US20220181454A1
公开(公告)日：2022-06-09
申请号：US17682239
申请日：2022-02-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan Xu , Yicheng Lin , Cuili Gai , Ling Wang , Yongqian Li
IPC: H01L29/417 , H01L27/12 , H01L27/32 , H01L29/66 , H01L29/786
Abstract: Embodiments of the present disclosure provide a thin film transistor, a method of manufacturing the same, and a display device. The thin film transistor includes a metal conductive pattern layer, an interlayer insulating layer, and a metal oxide layer; and the metal conductive pattern layer includes: a light shielding pattern, a source signal line, and/or a drain signal line; the metal oxide layer includes: a source electrode, a drain electrode, and an active layer. An orthographic projection of the active layer on the base substrate has an overlapping region with that of the light shielding pattern; the source electrode extends through the interlayer insulating layer to connect to the source signal line, and/or the drain electrode extends through the interlayer insulating layer to connect to the drain signal line.
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