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公开(公告)号：US20220238062A1
公开(公告)日：2022-07-28
申请号：US17721234
申请日：2022-04-14
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
IPC: G09G3/20
Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit and the second input circuit have a same circuit structure.
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公开(公告)号：US20210335203A1
公开(公告)日：2021-10-28
申请号：US16618106
申请日：2019-07-02
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
IPC: G09G3/20
Abstract: The present application discloses a shift-register unit. The shift-register unit includes a first sub-unit including a first input circuit coupled via a first node to a first output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal and the first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. Additionally, the shift-register unit includes a second sub-unit including a second input circuit coupled via a second node to a second output circuit. The second input circuit is configured to control a voltage level of the second node in response to the first input signal and the second output circuit is configured to output a second output signal in response to the voltage level of the second node.
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公开(公告)号：US20230306892A1
公开(公告)日：2023-09-28
申请号：US18325140
申请日：2023-05-30
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0286 , G09G2310/061 , G09G2310/08
Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit and the second input circuit have a same circuit structure.
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公开(公告)号：US11705047B2
公开(公告)日：2023-07-18
申请号：US17721234
申请日：2022-04-14
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0286 , G09G2310/061 , G09G2310/08
Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit and the second input circuit have a same circuit structure.
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公开(公告)号：US11373577B2
公开(公告)日：2022-06-28
申请号：US16618106
申请日：2019-07-02
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
IPC: G09G3/20
Abstract: The present application discloses a shift-register unit. The shift-register unit includes a first sub-unit including a first input circuit coupled via a first node to a first output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal and the first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. Additionally, the shift-register unit includes a second sub-unit including a second input circuit coupled via a second node to a second output circuit. The second input circuit is configured to control a voltage level of the second node in response to the first input signal and the second output circuit is configured to output a second output signal in response to the voltage level of the second node.
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Patent Agency Ranking
公开(公告)号：US11222577B2
公开(公告)日：2022-01-11
申请号：US16982148
申请日：2020-04-08
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
Abstract: The present disclosure provides a shift register unit, a gate driving circuit and compensation method and driving method thereof, and a display device. The shift register unit includes: a shift register circuit having a detection node, the shift register circuit is configured to receive an input signal and a clock signal, and generate an output signal based on the clock signal under control of the input signal; and a detection circuit coupled to the detection node of the shift register circuit, the detection circuit is configured to generate a detection signal based on a potential of the detection node.
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公开(公告)号：US11200825B2
公开(公告)日：2021-12-14
申请号：US16767230
申请日：2019-12-16
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
Abstract: The present disclosure provides a shift register unit and a method for driving the same, a gate driving circuit and a method for driving the same, and a display apparatus. The shift register unit includes a first input sub-circuit to an Nth input sub-circuit and a first output sub-circuit to an Nth output sub-circuit. N is an integer greater than or equal to 2. For n=1, 2, . . . , N, an nth input sub-circuit is electrically coupled to an nth input signal terminal, a first level signal terminal and a pull-up node, and an nth output sub-circuit is electrically coupled to an nth clock signal terminal, the pull-up node and an nth output signal terminal.
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公开(公告)号：US20240321170A1
公开(公告)日：2024-09-26
申请号：US18675466
申请日：2024-05-28
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0286 , G09G2310/061 , G09G2310/08
Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit includes a fifth transistor.
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公开(公告)号：US12027099B2
公开(公告)日：2024-07-02
申请号：US18325140
申请日：2023-05-30
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0286 , G09G2310/061 , G09G2310/08
Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit and the second input circuit have a same circuit structure.
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公开(公告)号：US20210166597A1
公开(公告)日：2021-06-03
申请号：US16767230
申请日：2019-12-16
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
Abstract: The present disclosure provides a shift register unit and a method for driving the same, a gate driving circuit and a method for driving the same, and a display apparatus. The shift register unit includes a first input sub-circuit to an Nth input sub-circuit and a first output sub-circuit to an Nth output sub-circuit. N is an integer greater than or equal to 2. For n=1, 2, . . . , N, an nth input sub-circuit is electrically coupled to an nth input signal terminal, a first level signal terminal and a pull-up node, and an nth output sub-circuit is electrically coupled to an nth clock signal terminal, the pull-up node and an nth output signal terminal.
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