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    Manufacturing method of array substrate, array substrate and display device
    32.
    发明授权
    Manufacturing method of array substrate, array substrate and display device 有权

    公开(公告)号：US10141352B2

    公开(公告)日：2018-11-27

    申请号：US15325402

    申请日：2016-03-09

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Zhanfeng Cao ,  Feng Zhang ,  Bin Zhang ,  Xiaolong He ,  Zhengliang Li ,  Wei Zhang ,  Feng Guan ,  Jincheng Gao

    IPC: H01L27/12 ,  H01L21/77

    Abstract: A manufacturing method of an array substrate is provided. The method includes sequentially depositing a first electrode layer and a gate metal layer on a base substrate, the first electrode layer including at least two conductive layers, formation materials of the at least two conductive layers having different etching rates. The method also includes forming a photoresist layer on the gate metal layer, exposing and developing the photoresist layer using a halftone mask plate, performing a first etching process on the gate metal layer, etching the first electrode layer, and ashing the photoresist layer, performing a second etching process on the gate metal layer by using remaining photoresist layer as a mask, stripping the remaining photoresist layer, and sequentially forming a semiconductor layer, a source and drain electrode layer, a via-hole and a second electrode layer on the gate metal layer on which the second etching process has been performed.

    COMPLEMENTARY THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND ARRAY SUBSTRATE
    34.
    发明申请
    COMPLEMENTARY THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND ARRAY SUBSTRATE 审中-公开

    公开(公告)号：US20180315781A1

    公开(公告)日：2018-11-01

    申请号：US15834198

    申请日：2017-12-07

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Xiaolong He ,  Dongsheng Li ,  Shengguang Ban

    IPC: H01L27/12 ,  H01L21/02

    Abstract: The present disclosure relates to a complementary thin film transistor, a manufacturing method thereof, and an array substrate in the field of semiconductors. The method includes: forming a first semiconductor layer on an active layer pattern and patterning the first semiconductor layer to form a first ohmic contact layer; forming a second semiconductor layer on the active layer pattern and patterning the second semiconductor layer to form a second ohmic contact layer. During the process of manufacturing the complementary thin film transistor, the first semiconductor layer is formed on the active layer pattern and the first semiconductor layer is patterned to form the first ohmic contact layer. In addition, the second semiconductor layer is formed on the active layer pattern and the second semiconductor layer is patterned to form the second ohmic contact layer. Since one of the first semiconductor layer and the second semiconductor layer is an N-type semiconductor layer and the other is a P-type semiconductor layer, doping is not needed and thus the manufacturing cost of the CMOS TFT may be reduced.

    Method for manufacturing array substrate, array substrate and display panel
    39.
    发明授权
    Method for manufacturing array substrate, array substrate and display panel 有权

    公开(公告)号：US10461178B2

    公开(公告)日：2019-10-29

    申请号：US15329212

    申请日：2016-07-25

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Shi Shu ,  Jing Feng ,  Chuanxiang Xu ,  Xiaolong He ,  Jiushi Wang

    IPC: H01L21/02 ,  H01L29/786 ,  H01L29/66 ,  H01L27/12

    Abstract: A method for manufacturing an array substrate, an array substrate and a display panel are provided. The method includes forming patterns of a gate metal layer and a gate insulating layer successively on a base plate, forming a pattern of a semiconductor layer, where the pattern of the semiconductor layer comprises a pattern of an active region and a pattern of a pixel electrode region, the semiconductor layer comprises an insulative oxide layer and a semiconductive oxide layer stacked on the insulative oxide layer, and the insulative oxide layer is located between the gate insulating layer and the semiconductive oxide layer, forming a pattern of a source and drain metal layer, and subjecting the semiconductive oxide layer in the pixel electrode region to plasma treatment, to convert the semiconductive oxide layer in the pixel electrode region into a conductor.

    Transfer device and transfer method
    40.
    发明授权
    Transfer device and transfer method 有权

    公开(公告)号：US10457498B2

    公开(公告)日：2019-10-29

    申请号：US15673242

    申请日：2017-08-09

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Xiaolong He ,  Zhifu Li ,  Zhiyuan Ji ,  Jikai Yao ,  Feng Guan

    IPC: B65G47/84 ,  B65G29/02 ,  B65G45/22 ,  H01L21/67 ,  H01L21/677 ,  H01L21/687 ,  B08B3/02

    Abstract: A transfer device and a transfer method using the same. The transfer device comprises a first conveyance roller, a transfer roller and a second conveyance roller. The transfer roller includes a roller body and stamp contacts formed on and protruded from the roller body. The stamp contacts can absorb elements, axes of the first conveyance roller. The transfer roller and the second conveyance roller are arranged in parallel with each other. The transfer roller is interposed between the first and second conveyance rollers. A first roll gap is formed between the first conveyance roller and the transfer roller to convey a medium substrate, and a second roll gap is formed between the second conveyance roller and the transfer roller to convey a target substrate. The transfer device and method can be used to transfer a great amount of elements to the substrate having large size.

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