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31.发明申请公开(公告)号：US20190096926A1
公开(公告)日：2019-03-28
申请号：US16090752
申请日：2018-02-13
Inventor： Jun LIU , Tongshang SU
IPC: H01L27/12 , H01L21/02 , H01L21/225 , H01L21/324 , H01L21/3065 , H01L29/786
Abstract: Embodiments of this disclosure provide a thin film of poly-silicon and a method for fabricating the same, and a thin film transistor and a method for fabricating the same, where a metal layer, a buffer layer, and an amorphous-silicon layer are formed on an underlying substrate successively, and metal atoms of the metal layer can be diffused to come into contact with the amorphous-silicon layer, so that the amorphous-silicon can be converted into a poly-silicon layer under the catalysis of the metal ions.
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公开(公告)号：US20180331320A1
公开(公告)日：2018-11-15
申请号：US15768972
申请日：2017-10-13
Inventor： Tongshang SU , Guangcai YUAN , Dongfang WANG , Bin ZHOU , Ce ZHAO , Jun LIU , Ning LIU , Kai XU , Shengping DU
IPC: H01L51/52 , H01L27/32 , G09G3/3225 , H01L51/56
CPC classification number: H01L51/5246 , G09G3/3225 , H01L23/3114 , H01L27/1248 , H01L27/322 , H01L27/3246 , H01L27/3258 , H01L51/5206 , H01L51/5221 , H01L51/5253 , H01L51/5259 , H01L51/56
Abstract: An organic light emitting diode (OLED) display panel and a manufacture method thereof, a display device are disclosed. The method includes providing a base substrate, including a display area and a package area; forming a driving transistor, a passivation layer and an OLED display unit on the base substrate, wherein the OLED display unit and the driving transistor are formed in the display area, the passivation layer is formed in both the display area and the package area and includes a plurality of recesses in the package area and a via hole in the display area, and the via hole and the plurality of recesses are formed by same one patterning process; coating a sealant in the package area to cover the plurality of recesses; and providing a package substrate, the package substrate and the base substrate being assembled together and sealed oppositely by the sealant.
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公开(公告)号：US20240306457A1
公开(公告)日：2024-09-12
申请号：US18245134
申请日：2022-03-25
Inventor： Liu WU , Zhidong YUAN , Yongqian LI , Can YUAN , Chuanchuan CHANG , Jun LIU , Tao SUN
IPC: H10K59/131 , H10K59/12 , H10K59/88
CPC classification number: H10K59/1315 , H10K59/1201 , H10K59/88
Abstract: A display substrate and a manufacturing method therefor, and a display device. The display substrate includes: a base substrate including a special-shaped display area and a frame area located on one side of the special-shaped display area; and the special-shaped display area includes a first display area and a second display area on located on one side of the first display area, and the second display area is arranged in contact with the frame area; a group of data lines located on the base substrate and located in the first display area and the second display area; a group of fan-out lines located on a side of a layer where the group of data lines are located away from the base substrate, located in the first display area, and electrically connected to the data lines; and a group of dummy leads.
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公开(公告)号：US20240215342A1
公开(公告)日：2024-06-27
申请号：US17915522
申请日：2021-05-28
Inventor： Yongchao HUANG , Jingang FANG , Jun CHENG , Xinxin WANG , Jun LIU , Qinghe WANG , Leilei CHENG , Bin ZHOU , Ce ZHAO , Liangchen YAN
IPC: H10K59/126 , H10K59/12 , H10K59/122
CPC classification number: H10K59/126 , H10K59/1201 , H10K59/122
Abstract: A display panel includes a substrate, a driving layer and a light-emitting control layer. The driving layer is provided with a plurality of driving transistors arranged into a plurality of transistor rows in a column direction. The light-emitting control layer includes a plurality of light-emitting devices arranged into a plurality of device rows in the column direction, the device rows is spaced apart by the transistor row in the column direction, and the transistor rows is spaced apart by the device row in the column direction. The pixel-defining layer is provided with a plurality of blocking grooves recessed toward the substrate, the plurality of blocking grooves are arranged in the column direction, at least one of the plurality of blocking grooves is arranged between the transistor row and the device row adjacent in the column direction, and a light-shielding layer is arranged in the blocking groove.
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35.发明公开公开(公告)号：US20240164179A1
公开(公告)日：2024-05-16
申请号：US17918630
申请日：2021-11-23
Inventor： Yang ZHANG , Bin ZHOU , Ning LIU , Jun LIU , Peng WANG , Lei ZHOU , Duoduo WANG
CPC classification number: H10K59/80522 , H10K59/1201
Abstract: A light-emitting substrate includes: a substrate; and at least one coupling portion and at least one auxiliary cathode pattern disposed on the substrate. Each auxiliary cathode region is provided with a coupling portion and an auxiliary cathode pattern coupled to the coupling portion. The auxiliary cathode pattern includes at least one disconnection portion, and each disconnection portion includes first, second and third conductive pattern layers. An orthographic projection of an edge of the second conductive pattern layer on the substrate is located within orthographic projections of edges of the third and first conductive pattern layers on the substrate. A total perimeter of at least one orthographic projection, on the substrate, of at least one edge of at least one third conductive pattern layer in the at least one disconnection portion is greater than a perimeter of an orthographic projection of an edge of the auxiliary cathode region on the substrate.
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Patent Agency Ranking
公开(公告)号：US20240138211A1
公开(公告)日：2024-04-25
申请号：US17926747
申请日：2021-11-29
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Jun LIU
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: A display substrate and a display device are provided. The display substrate includes: a base substrate and a plurality of sub-pixels arranged on the base substrate, the plurality of the sub-pixels are arranged in an array, the sub-pixel includes: a reference signal line and a second scan line; and a sub-pixel driving circuit including a driving transistor and a second transistor, a gate electrode of the second transistor is coupled to the second scan line, a first electrode of the second transistor and the reference signal line form an integrated structure, a second electrode of the second transistor is coupled to a gate electrode of the driving transistor.
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公开(公告)号：US20210367017A1
公开(公告)日：2021-11-25
申请号：US17241703
申请日：2021-04-27
Inventor： Ning LIU , Jun LIU , Wei SONG , Qinghe WANG , Bin ZHOU , Liangchen YAN
IPC: H01L27/32
Abstract: An array substrate, a method for manufacturing the array substrate and a display device are provided. The array substrate includes: a base substrate, and a thin film transistor, a storage capacitor, and a lapping pattern for connecting the thin film transistor to the storage capacitor arranged on the base substrate; wherein the thin film transistor includes a semiconductor layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a source electrode and a drain electrode arranged sequentially in that order; the interlayer insulation layer includes at least two inorganic insulation layers and at least one organic insulation layer laminated one on another, and both a layer proximate to the base substrate and a layer distal to the base substrate in the interlayer insulation layer are the inorganic insulation layers.
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公开(公告)号：US20210175263A1
公开(公告)日：2021-06-10
申请号：US16859558
申请日：2020-04-27
IPC: H01L27/12 , H01L21/02 , H01L29/66 , H01L29/24 , H01L29/786
Abstract: An array substrate, a method for manufacturing the same and a display device are provided. The method includes: providing a base substrate; forming a conductive material thin film on the base substrate; forming a first photoresist layer on a side of the conductive material thin film distal to the base substrate; etching the conductive material thin film by using the first photoresist layer as a mask to obtain a first etched pattern; removing third covering portions of the first photoresist layer to obtain a second photoresist layer; and etching the first etched pattern by using the second photoresist layer as a mask to obtain a gate electrode and a signal line.
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公开(公告)号：US20210066352A1
公开(公告)日：2021-03-04
申请号：US16919903
申请日：2020-07-02
Inventor： Leilei CHENG , Bin ZHOU , Jun LIU , Luke DING , Qinghe WANG , Yongchao HUANG
IPC: H01L27/12 , G02F1/1333 , G02F1/1362
Abstract: An array substrate includes an insulation layer and one or more stepped holes each penetrating through the insulation layer in a direction perpendicular to the insulation layer. Each stepped hole includes a first hole and a second hole under the first hole, a radius of the first hole at a bottom is a first radius, a radius of the second hole at a top is a second radius which is substantially smaller than the first radius, and a difference between the first radius and the second radius is 0.2 μm to 0.6 μm.
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公开(公告)号：US20200035716A1
公开(公告)日：2020-01-30
申请号：US16396726
申请日：2019-04-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Bin ZHOU , Binbin CAO , Liangchen YAN , Dongfang WANG , Ce ZHAO , Luke DING , Jun LIU
IPC: H01L27/12
Abstract: The present disclosure is in the field of display technologies, and provides an array substrate including an IGZO film layer, a gate layer, and a gate insulating layer. The gate layer is provided with broken lines at a position thereof overlapping the IGZO film layer to form a first gate line and a second gate line. The gate insulating layer is disposed between the IGZO film layer and the gate layer, and is provided with at least two through holes thereon, in which the first gate line is connected with the IGZO film layer through one of the through holes, and the second gate line is connected with the IGZO film layer through another through hole, thus, connecting the IGZO film layer in series into the gate layer.
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