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公开(公告)号：US20250014520A1
公开(公告)日：2025-01-09
申请号：US18272595
申请日：2022-07-28
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU , Luke DING , Cheng XU , Miao LIU , Xing YAO
IPC: G09G3/3266 , G11C19/28
Abstract: Provided is a gate driver circuit. The gate driver circuit is applicable to a display panel, wherein the display panel includes a plurality of rows of pixels; the gate driver circuit including at least one gate driver sub-circuit; wherein the gate driver sub-circuit includes: at least two shift register groups, wherein each shift register group includes a plurality of shift register units; at least two first dummy units, wherein the at least two first dummy units are respectively coupled to a same input enable terminal and the at least two shift register groups; and at least two second dummy units, wherein the at least two second dummy units are coupled to the at least two shift register groups.
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公开(公告)号：US20240395198A1
公开(公告)日：2024-11-28
申请号：US18262121
申请日：2022-05-30
Inventor： Liu WU , Xuehuan FENG , Yongqian LI
IPC: G09G3/3233 , G11C19/28
Abstract: A pixel circuit includes: a driving sub-circuit, a sensing sub-circuit, a light-emitting control sub-circuit, a sensing control sub-circuit, a light-emitting device and a sensing terminal. The driving sub-circuit includes a first terminal and a second terminal coupled to the light-emitting device, and is configured to write a data signal into the driving sub-circuit in response to a first scan signal and control an electrical signal flowing through the driving sub-circuit according to the data signal. The sensing sub-circuit is configured to connect the second terminal to the sensing terminal in response to a second scan signal. The light-emitting control sub-circuit is configured to connect a first voltage terminal to the first terminal in response to a light-emitting control signal. The sensing control sub-circuit is configured to connect a second voltage terminal to the first terminal in response to a sensing control signal provided by a sensing control terminal.
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公开(公告)号：US20250140182A1
公开(公告)日：2025-05-01
申请号：US18262322
申请日：2022-06-01
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU
IPC: G09G3/3233 , G09G3/32
Abstract: A display panel includes a first pixel driving circuit and a second pixel driving circuit. A data writing transistor and a driving transistor in the first pixel driving circuit, a driving transistor and a data writing transistor in the second pixel driving circuit are sequentially arranged. In the first pixel driving circuit, a first electrode plate of a capacitor is coupled to the driving transistor at a first coupling position and coupled to a first light-emitting device at a second coupling position located at a side of the first coupling position away from the data writing transistor. In the second pixel driving circuit, a first electrode plate of a capacitor is coupled to the driving transistor at a third coupling position and coupled to a second light-emitting device at a fourth coupling position located between the third coupling position and the data writing transistor.
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公开(公告)号：US20250089365A1
公开(公告)日：2025-03-13
申请号：US18557810
申请日：2022-07-28
Inventor： Can YUAN , Luke DING , Zhidong YUAN , Liu WU , Yongqian LI , Dacheng ZHANG , Cheng XU , Dandan ZHOU
IPC: H01L27/12 , G09G3/00 , G09G3/3225
Abstract: A display substrate including a base substrate and a driving module arranged on the base substrate, the driving module includes at least one driving unit, and the driving unit includes N stages of driving circuits; N is a positive integer, n is a positive integer less than or equal to N; the nth stage of driving circuit includes a (2n−1)th stage of output circuit, a 2nth stage of output circuit and a first node control circuit; the first node is electrically connected to the (2n−1)th stage of output circuit and the 2nth stage of output circuit respectively through a first connection line; the driving module also includes a scanning line; there are at least two mutually independent overlapping portions between the orthographic projection of the first connection line on the base substrate and the orthographic projection of the scanning line on the base substrate.
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公开(公告)号：US20250022416A1
公开(公告)日：2025-01-16
申请号：US18580006
申请日：2022-11-01
Inventor： Liu WU , Zhidong YUAN , Yongqian LI , Li SUN
IPC: G09G3/3233
Abstract: A display panel and a display device are provided, the first signal line extends from the display region to the electrostatic discharge region in a first direction, and provides a first display signal to the sub-pixels; the electrostatic discharge units are arranged in the first direction, each electrostatic discharge unit includes a sub electrostatic discharge unit, each sub electrostatic discharge unit includes an electrostatic discharge circuit and a first conductor, the electrostatic discharge circuit is connected to the first signal line and the first conductor, and charges on the first signal line move towards the first conductor; the electrostatic discharge units include two adjacent electrostatic discharge units in a second direction perpendicular to the first direction, orthographic projections of the two adjacent electrostatic discharge units on a plane parallel to the first direction are not overlapped, and on a plane parallel to the second direction are overlapped.
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Patent Agency Ranking
公开(公告)号：US20240395201A1
公开(公告)日：2024-11-28
申请号：US18272811
申请日：2022-07-29
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU , Xiuting LIU , Luke DING , Cheng XU , Miao LIU , Xing YAO
IPC: G09G3/3233 , G11C19/28 , H10K59/131
Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.
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公开(公告)号：US20240306457A1
公开(公告)日：2024-09-12
申请号：US18245134
申请日：2022-03-25
Inventor： Liu WU , Zhidong YUAN , Yongqian LI , Can YUAN , Chuanchuan CHANG , Jun LIU , Tao SUN
IPC: H10K59/131 , H10K59/12 , H10K59/88
CPC classification number: H10K59/1315 , H10K59/1201 , H10K59/88
Abstract: A display substrate and a manufacturing method therefor, and a display device. The display substrate includes: a base substrate including a special-shaped display area and a frame area located on one side of the special-shaped display area; and the special-shaped display area includes a first display area and a second display area on located on one side of the first display area, and the second display area is arranged in contact with the frame area; a group of data lines located on the base substrate and located in the first display area and the second display area; a group of fan-out lines located on a side of a layer where the group of data lines are located away from the base substrate, located in the first display area, and electrically connected to the data lines; and a group of dummy leads.
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公开(公告)号：US20240373687A1
公开(公告)日：2024-11-07
申请号：US18249359
申请日：2022-03-07
Inventor： Liu WU , Zhidong YUAN , Yongqian LI , Can YUAN
IPC: H10K59/131 , H10K59/10 , H10K59/121
Abstract: A profiled display panel, including a display area. The display area includes a plurality of display sub-areas; a plurality of cascade signal lines for coupling adjacent two of the gate driving sub-circuits. At least one cascade signal line includes a first cascade trace extending in a first direction and a second cascade trace extending in a second direction. The first cascade trace includes a plurality of first conductive patterns arranged on a first conductive layer and second conductive pattern arranged on a second conductive layer. The plurality of first conductive patterns are electrically connected to the second conductive pattern; and the second cascade trace includes a third conductive pattern arranged on the first conductive layer.
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公开(公告)号：US20240355286A1
公开(公告)日：2024-10-24
申请号：US18682942
申请日：2022-03-24
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU
IPC: G09G3/3233 , G11C19/28
CPC classification number: G09G3/3233 , G11C19/287 , G09G2300/0842 , G09G2310/0286 , G09G2310/08
Abstract: A display panel includes pixel driving circuits distributed in an array and forming pixel driving circuit groups, each pixel driving circuit group includes pixel driving circuit rows with each including pixel driving circuits, each of which includes a driving circuit connected to a first, second and third nodes, to input a driving current to the third node through the second node in response to a signal of the first node; a first switching unit with a first end connected to a first power supply terminal and second end connected to the second node, to connect the first power supply terminal and the second node in response to a pulse width modulation signal; in a same pixel driving circuit group, a second end of any first switching unit is connected to a second end of at least one first switching unit in each of the other pixel driving circuit rows.
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公开(公告)号：US20240260343A1
公开(公告)日：2024-08-01
申请号：US18018550
申请日：2022-02-25
Inventor： Zhidong YUAN , Yongqian LI , Li SUN , Liu WU , Can YUAN
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: A display substrate and a display apparatus are provided, and the display substrate includes: a base substrate including a display area and a bonding area located at a side of the display area, the display area includes a first circuit signal line and a second circuit signal line, and the bonding area includes a bonding signal pin; a circuit structure layer located in the display area. The circuit structure layer includes at least one first circuit region and at least one second circuit region; the first circuit region includes at least one first gate drive circuit; the second circuit region includes at least one second gate drive circuit; the first gate drive circuit includes multiple cascaded first gate drive units, and the second gate drive circuit includes multiple cascaded second gate drive units; the multiple the first gate drive units are sequentially arranged along a second direction.
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