公开(公告)号：US20070194826A1

公开(公告)日：2007-08-23

申请号：US11675084

申请日：2007-02-15

Applicant: Sen-Huang Tang ,  Yi-Shu Chang

Inventor： Sen-Huang Tang ,  Yi-Shu Chang

IPC: H03L7/00

CPC classification number: H03L7/0814 ,  H03K5/133 ,  H03K5/135 ,  H03K2005/00247

Abstract: The present invention discloses a circuit capable of self-correcting delay time that includes a clock generating unit for generating a clock signal, a processing unit for producing a counter enable signal according to a reference clock, and a counting unit for receiving the counter enable signal and using the clock signal to count the reference clock for producing a count value, and the count value is returned to the processing unit for performing an analysis to obtain a delay time. The present invention can effectively overcome the shortcomings of the prior art that requires a delay circuit to make corrections one by one, and thus the invention can greatly save the time, manpower, and cost incurred.

Abstract translation: 本发明公开了一种能够进行自校正延迟时间的电路，包括用于产生时钟信号的时钟产生单元，用于根据参考时钟产生计数器使能信号的处理单元，以及用于接收计数器使能信号的计数单元 并且使用时钟信号对用于产生计数值的参考时钟进行计数，并且将计数值返回到处理单元以进行分析以获得延迟时间。 本发明可以有效地克服需要延迟电路逐个进行校正的现有技术的缺点，从而可以大大节省时间，人力和成本。

公开(公告)号：US20070165036A1

公开(公告)日：2007-07-19

申请号：US11306190

申请日：2005-12-19

Applicant: Yi-Shu Chang ,  Wen-Che Wu ,  Wen-Jui Lin

Inventor： Yi-Shu Chang ,  Wen-Che Wu ,  Wen-Jui Lin

IPC: G06F13/14

CPC classification number: G06F8/61 ,  G06F8/654

Abstract: A system for programming at least a controller chip is disclosed. The system includes a programming apparatus and at least a programmable device mounted on the programming apparatus. The programming apparatus has at least a first connection interface and a micro-controller. The programmable device has the monitor controller chip mounted thereon and a second connection interface coupled between the first connection interface and the controller chip. The micro-controller controls the programming of the controller chip.

Abstract translation: 公开了一种用于至少编程控制器芯片的系统。 该系统包括编程设备和至少一个安装在编程设备上的可编程设备。 编程设备至少具有第一连接接口和微控制器。 可编程装置具有安装在其上的监视器控制器芯片和耦合在第一连接接口和控制器芯片之间的第二连接接口。 微控制器控制控制器芯片的编程。

公开(公告)号：US07242735B2

公开(公告)日：2007-07-10

申请号：US10632925

申请日：2003-08-04

Applicant: Chao-Hsin Lu ,  Yi-Shu Chang ,  Shiu-Rong Tong ,  Kuang-Hsi Hsieh

Inventor： Chao-Hsin Lu ,  Yi-Shu Chang ,  Shiu-Rong Tong ,  Kuang-Hsi Hsieh

IPC: H04L7/02

CPC classification number: H04L7/0338

Abstract: A data recovery system and method is disclosed, which comprises an oversampler, a phase detection circuit, a data pick circuit, a data overlap/skip detection circuit and a data correction circuit. The oversampler oversamples an input signal and thus generates oversampled signals. The phase detection circuit receives for detecting transitions of the oversampled signals and outputting a phase signal. The data pick circuit receives the phase signal, accordingly groups the oversampled signals into n groups and picks one group as an output data. The data overlap/skip detection circuit determines if data is overlapped or skipped according to the phase signal and the last phase signal. The data correction circuit corrects data when data is overlapped or skipped and outputs an accurate output data.

Abstract translation: 公开了一种数据恢复系统和方法，其包括过采样器，相位检测电路，数据拾取电路，数据重叠/跳过检测电路和数据校正电路。 过采样器过采样输入信号，从而产生过采样信号。 相位检测电路接收用于检测过采样信号的转变并输出相位信号。 数据采集​​电路接收相位信号，相应地将过采样信号分组为n组，并选择一组作为输出数据。 数据重叠/跳跃检测电路根据相位信号和最后的相位信号确定数据是否重叠或跳过。 当数据重叠或跳过时，数据校正电路校正数据，并输出准确的输出数据。

公开(公告)号：US20070106835A1

公开(公告)日：2007-05-10

申请号：US11594068

申请日：2006-11-08

Applicant: Wen-Jui Lin ,  Hsien-Chun Chang ,  Yi-Shu Chang ,  Wen-Che Wu

Inventor： Wen-Jui Lin ,  Hsien-Chun Chang ,  Yi-Shu Chang ,  Wen-Che Wu

IPC: G06F12/00

CPC classification number: G06F8/65 ,  G09G3/2096 ,  G09G5/363 ,  G09G2320/0606 ,  G09G2320/08

Abstract: A controller and a method of updating parameters on the same. The controller includes an embedded non-volatile memory, a programming circuit, an embedded SRAM, a MCU (Micro Computer Unit), and a memory controller. The embedded non-volatile memory has a program code block for storing program codes to be executed by the MCU, and a data block for storing the parameters. The MCU writes the parameters into the data block of the flash memory through the memory controller, or reads data in the data block of the non-volatile memory through the memory controller. Because the controller does not need to employ an external EEPROM, the cost can be reduced and the speed for accessing the parameters can be increased.

Abstract translation: 控制器和更新参数的方法。 控制器包括嵌入式非易失性存储器，编程电路，嵌入式SRAM，MCU（微计算机单元）和存储器控制器。 嵌入式非易失性存储器具有用于存储要由MCU执行的程序代码的程序代码块和用于存储参数的数据块。 MCU通过存储器控制器将参数写入闪存的数据块，或通过存储器控制器读取非易失性存储器的数据块中的数据。 由于控制器不需要使用外部EEPROM，因此可以降低成本，并且可以提高访问参数的速度。

公开(公告)号：US20060038922A1

公开(公告)日：2006-02-23

申请号：US11161847

申请日：2005-08-18

Applicant: Ming-Jane Hsieh ,  Yi-Shu Chang ,  Te-Ming Kuo

Inventor： Ming-Jane Hsieh ,  Yi-Shu Chang ,  Te-Ming Kuo

IPC: H04N5/445

CPC classification number: H04N5/44508 ,  H04N5/4401 ,  H04N5/45 ,  H04N21/42646 ,  H04N21/4316 ,  H04N21/4347

Abstract: A video data displaying device is disclosed. The video data displaying device is used to drive a displayer according to a first display data set to display a first picture, the displaying device comprises a memory for storing the first display data set, and a display engine which is electrically connected to the memory for storing a part of the first display data set stored in the memory, wherein the display engine selects a specific display data set from the first display data set according to a display area of the displayer, and the display engine does not output the specific display data to the displayer.

Abstract translation: 公开了一种视频数据显示装置。 视频数据显示装置用于根据第一显示数据集来驱动显示器以显示第一图像，显示装置包括用于存储第一显示数据组的存储器，以及电连接到存储器的显示引擎， 存储存储在存储器中的第一显示数据组的一部分，其中显示引擎根据显示器的显示区域从第一显示数据组中选择特定显示数据集，并且显示引擎不输出特定显示数据 到显示器。

公开(公告)号：US20050270420A1

公开(公告)日：2005-12-08

申请号：US11142932

申请日：2005-06-02

Applicant: Chia-Hao Hsiung ,  Yi-Shu Chang ,  Ting-Yang Chang

Inventor： Chia-Hao Hsiung ,  Yi-Shu Chang ,  Ting-Yang Chang

IPC: H04L7/033 ,  H04N5/44 ,  H04N7/035 ,  H04N5/217

CPC classification number: H04N7/035 ,  H04L7/0331 ,  H04N5/44 ,  H04N21/435 ,  H04N21/8126

Abstract: A VBI receiver and method is disclosed. The receiver includes an over-sampling circuit, a transition detector, a data selector, and a data output device. The over-sampling circuit is for over-sampling VBI data and outputting an over-sampled signal. The transition detector is for detecting the transition of the over-sampled signal and outputting a transition signal representing the transition position. The data selector is for recording the transition signal and outputting a position signal according to the transition signal and at least a previous transition signal. The data output device outputs digital output data from the over-sampled signal according to the position signal.

Abstract translation: 公开了一种VBI接收机和方法。 接收机包括过采样电路，转换检测器，数据选择器和数据输出装置。 过采样电路用于对VBI数据进行过采样并输出过采样信号。 转换检测器用于检测过采样信号的转变并输出表示转换位置的转换信号。 数据选择器用于记录转换信号并根据转换信号和至少先前的转换信号输出位置信号。 数据输出装置根据位置信号从过采样信号输出数字输出数据。

公开(公告)号：US20050055597A1

公开(公告)日：2005-03-10

申请号：US10933896

申请日：2004-09-03

Applicant: Wen-Shiung Weng ,  Chi-Kung Kuan ,  Sheng-Kai Chen ,  Ming-Chun Chang ,  Yi-Shu Chang

Inventor： Wen-Shiung Weng ,  Chi-Kung Kuan ,  Sheng-Kai Chen ,  Ming-Chun Chang ,  Yi-Shu Chang

IPC: G06F1/04 ,  G06F1/08

CPC classification number: G06F1/08

Abstract: A clock tuning device and method for executing overclocking operations on plural elements disposed on a motherboard. The clock tuning device includes a phase-locked loop for outputting a plurality of clock signals to the elements, and a control circuit for controlling the phase-locked loop to adjust the frequencies of the clock signals, so as to execute the overclocking operations on the elements, respectively. The method includes the steps of: increasing the frequency of a first clock signal until one of the elements can't work normally due to an utmost frequency of the first clock signal; resetting all the elements and operating the element corresponding to the first signal according to a safe frequency of the first clock signal; and repeating the above steps to perform overclocking operation on each of the other elements.

Abstract translation: 一种用于对设置在母板上的多个元件执行超频操作的时钟调谐装置和方法。 时钟调谐装置包括用于向元件输出多个时钟信号的锁相环，以及用于控制锁相环以调整时钟信号的频率的控制电路，以便对该时钟信号执行超频操作 元素。 该方法包括以下步骤：增加第一时钟信号的频率，直到其中一个元件由于第一时钟信号的最大频率而不能正常工作; 根据第一时钟信号的安全频率，复位所有元件并对与第一信号相对应的元件进行操作; 并重复上述步骤对每个其他元件执行超频操作。

公开(公告)号：US08976301B2

公开(公告)日：2015-03-10

申请号：US11896242

申请日：2007-08-30

Applicant: Yi-Shu Chang

Inventor： Yi-Shu Chang

IPC: H04N5/455 ,  H04N5/44 ,  H04N5/50 ,  H04N21/426 ,  H04N21/438

CPC classification number: H04N5/50 ,  H04N5/455 ,  H04N21/4263 ,  H04N21/4384

Abstract: The invention provides a digital television tuner having at least two branches that receive a radio frequency signal, wherein the radio frequency signal carries M channels (M is a positive integer). A target image data is generated in real time since at least one of the branches pre-extracts the image compression data of the next channel to be switched to.

Abstract translation: 本发明提供一种数字电视调谐器，其具有接收射频信号的至少两个分支，其中射频信号携带M个信道（M是正整数）。 目标图像数据是实时生成的，因为至少一个分支预先提取要切换到的下一个信道的图像压缩数据。

公开(公告)号：US08914602B2

公开(公告)日：2014-12-16

申请号：US11594068

申请日：2006-11-08

Applicant: Wen-Jui Lin ,  Hsien-Chun Chang ,  Yi-Shu Chang ,  Wen-Che Wu

Inventor： Wen-Jui Lin ,  Hsien-Chun Chang ,  Yi-Shu Chang ,  Wen-Che Wu

IPC: G06F12/00 ,  G06F9/445 ,  G09G3/20 ,  G09G5/36

CPC classification number: G06F8/65 ,  G09G3/2096 ,  G09G5/363 ,  G09G2320/0606 ,  G09G2320/08

Abstract: A controller and a method of updating parameters on the same. The controller includes an embedded non-volatile memory, a programming circuit, an embedded SRAM, a MCU (Micro Computer Unit), and a memory controller. The embedded non-volatile memory has a program code block for storing program codes to be executed by the MCU, and a data block for storing the parameters. The MCU writes the parameters into the data block of the flash memory through the memory controller, or reads data in the data block of the non-volatile memory through the memory controller. Because the controller does not need to employ an external EEPROM, the cost can be reduced and the speed for accessing the parameters can be increased.

Abstract translation: 控制器和更新参数的方法。 控制器包括嵌入式非易失性存储器，编程电路，嵌入式SRAM，MCU（微计算机单元）和存储器控制器。 嵌入式非易失性存储器具有用于存储要由MCU执行的程序代码的程序代码块和用于存储参数的数据块。 MCU通过存储器控制器将参数写入闪存的数据块，或通过存储器控制器读取非易失性存储器的数据块中的数据。 由于控制器不需要使用外部EEPROM，因此可以降低成本，并且可以提高访问参数的速度。

公开(公告)号：US20120127265A1

公开(公告)日：2012-05-24

申请号：US13299306

申请日：2011-11-17

Applicant: Yi-Shu Chang ,  Yung-Chin Chen ,  I-Ming Pao

Inventor： Yi-Shu Chang ,  Yung-Chin Chen ,  I-Ming Pao

IPC: H04N13/00

CPC classification number: H04N13/128 ,  H04N2013/0081

Abstract: The disclosure is regarding methods and apparatus for stereoscopic effect adjustment on video. The method for stereoscopic effect adjustment on video comprises receiving a 3D video, analyzing the 3D video for generating an analyzing result, and adjusting the 3D video according to a user preference input for stereoscopic effect and the analyzing result to generate a new 3D video. The apparatus for stereoscopic effect adjustment on video comprises a video analysis module, for receiving a 3D video and analyzing the 3D video to generate an analyzing result, and a 3D parameter adjustment module, for adjusting the 3D video according to a user preference input for stereoscopic effect and the analyzing result to generate a new 3D video.

Abstract translation: 本公开涉及用于对视频进行立体效果调整的方法和装置。 用于视频立体效果调整的方法包括：接收3D视频，分析3D视频以产生分析结果，以及根据用于用于立体效果的用户偏好输入和分析结果来调整3D视频以生成新的3D视频。 用于视频立体效果调整的装置包括：视频分析模块，用于接收3D视频并分析3D视频以产生分析结果;以及3D参数调整模块，用于根据用于用于立体视觉的用户偏好输入调整3D视频 效果和分析结果生成新的3D视频。