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公开(公告)号：US09818361B2
公开(公告)日：2017-11-14
申请号：US14901697
申请日：2015-10-21
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng Xiao , Mang Zhao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0408 , G09G2310/0251 , G09G2310/0283 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G2330/04
Abstract: A GOA circuit and a liquid crystal device (LCD) are disclosed. The GOA circuit includes a plurality of GOA units and a control module. Each of the cascaded GOA units is configured for charging corresponding horizontal scanning lines within a display area when being driven by a first level clock, a second level clock, a first control clock, and a second control clock. After the horizontal scanning lines are fully charged by the GOA circuit, the control module is configured for resetting the gate driving signals to be at the first level, i.e., the invalid level, via the turn-on pulse signals and the negative-voltage constant-voltage source.
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公开(公告)号：US09818359B2
公开(公告)日：2017-11-14
申请号：US14889272
申请日：2015-09-25
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng Xiao , Mang Zhao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3659 , G09G2300/0426 , G09G2310/0283 , G09G2310/0286 , G09G2310/08
Abstract: A scanning-driving circuit and a liquid crystal display device are disclosed. The scanning-driving circuit has a forward-backward scanning module to output a forward and backward scanning-driving signals; a pull-up holding module connected to the forward-backward scanning module to receive a selecting signal of the forward-backward scanning module and to pull up a voltage level of a pull-down control signal node; an input module connected to the forward-backward scanning module and the pull-up holding module to receive a previous-stage clock signal and to charge a pull-up control signal node; a control module connected to the pull-up holding module to receive a present-stage clock signal and to control the pull-up holding module; an output module connected to the pull-up holding module and the control module to output a scanning-driving signal to a scanning line, and to transmit the scanning-driving signal to a pixel unit to ensure a stability of the scanning-driving circuit.
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公开(公告)号：US20170301302A1
公开(公告)日：2017-10-19
申请号：US14917571
申请日：2016-01-29
Inventor： Mang Zhao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/36 , G09G2300/0408 , G09G2310/0286 , G09G2310/0289 , G09G2310/08
Abstract: The present invention provides a GOA circuit and a liquid crystal display device. The GOA circuit adds the stage transfer unit (900) and the stage transfer pull-down unit (800) and modifying the global control auxiliary unit (1000) to use the stage transfer end (ST(N)) of the stage transfer unit (900) to output the signal which is different from the scan driving signal to be the stage transfer signal and to use the global control auxiliary unit (1000) to stable the voltage level of the stage transfer end (ST(N)) in the period that the output ends (G(N)) of all the GOA units output the scan driving signal at the same time, the signal outputted by the stage transfer end (ST(N)) is opposite to the voltage level of the scan driving signal.
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公开(公告)号：US09792871B2
公开(公告)日：2017-10-17
申请号：US14905967
申请日：2015-12-23
IPC: G09G3/36 , G02F1/1345 , G02F1/1368
CPC classification number: G09G3/3677 , G02F1/13454 , G02F1/1368 , G09G2300/0819 , G09G2310/0251 , G09G2310/0286 , G09G2310/08 , G09G2330/021
Abstract: A GOA circuit includes GOA circuit units. When scan signal outputted by a previous stage GOA circuit unit and a next stage GOA circuit unit are at a low level, a fifth transistor controlled by the scan signal of previous stage GOA circuit unit and a sixth transistor controlled by the scan signal of a next stage GOA circuit unit turn on, so that the current stage GOA circuit unit starts to operate, and voltage of a control node becomes the same as the first constant voltage. When a third clock signal is triggered, the scan signal of the previous stage GOA circuit unit is charged from the low level, which was maintained previously, to the first constant voltage. Therefore, scan signal of GOA circuit unit will not affect the normal stage transmission of other GOA circuit units, and mitigate the problem of outputting redundant scan signal pulse.
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公开(公告)号：US20170263203A1
公开(公告)日：2017-09-14
申请号：US14913981
申请日：2015-12-22
Inventor： Mang Zhao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3696 , G09G2300/0408 , G09G2300/0819 , G09G2310/0286 , G09G2310/0291 , G09G2310/08 , G09G2330/021 , G11C19/28
Abstract: The invention provides a CMOS GOA circuit, by disposing a feedback regulation module (4) connected to output buffer module (3) and signal processing module (2) in the GOA unit, to achieve the following: when the scan driver signal (G(N)) becomes high, the positive feedback from the sixth N-type TFT (T6) of feedback regulation module (4) will enhance the pull-down capability of the signal processing module (2) to reduce the rising time of the scan driver signal (G(N)) waveform; when the scan driver signal (G(N)) becomes low, the positive feedback from the fifth P-type TFT (T5) of feedback regulation module (4) will enhance the pull-up capability of the signal processing module (2) to reduce the falling time of scan driver signal (G(N)) waveform; that is, the invention can reduce the RC loading of scan driver signal (G(N)) and improve the stability of high resolution display panel.
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Patent Agency Ranking
公开(公告)号：US09722094B2
公开(公告)日：2017-08-01
申请号：US14783802
申请日：2015-09-09
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
IPC: H01L29/786 , H01L29/423 , H01L29/66
CPC classification number: H01L29/78696 , H01L29/42384 , H01L29/66757 , H01L29/78621 , H01L29/78645 , H01L29/78675
Abstract: The present invention proposes a TFT, an array substrate, and a method of forming a TFT. The TFT includes a substrate, a buffer layer, a patterned poly-si layer, an isolation layer, a gate layer, and a source/drain pattern layer. The poly-si layer includes a heavily doped source and a heavily doped drain, and a channel. The gate layer includes a first gate area and a second gate area. The source/drain pattern layer includes a source pattern, a drain pattern and a bridge pattern, with the source pattern electrically connecting the heavily doped source, the drain pattern electrically connecting the heavily doped drain, and one end of the bridge pattern connecting the first gate area and the second gate area. The driving ability of the present inventive TFT is enhanced without affecting the leakage current.
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公开(公告)号：US11977288B1
公开(公告)日：2024-05-07
申请号：US18458151
申请日：2023-08-30
Inventor： Haosen Ge , Mang Zhao , Xiaoxu Lian , Qiang Gong
IPC: G02F1/1333 , G02F1/1335 , G06F3/041
CPC classification number: G02F1/13338 , G06F3/0412 , G02F1/133512 , G02F1/133514
Abstract: A touch display panel includes first and second substrates that are disposed opposite to each other, and a liquid crystal layer between the first and second substrates. The first substrate includes a base substrate, a plurality of data lines, at least two touch wirings, at least two touch electrodes, and a pixel electrode. The data lines and the touch wirings are disposed on the base substrate. The touch electrodes are provided at a side of the data lines away from the base substrate. There is a gap between two adjacent touch electrodes. In a direction perpendicular to the base substrate, the gap overlaps with at least a portion of the touch wirings, the data lines overlap with the touch electrodes, and the data lines do not overlap with the gap. The pixel electrode is disposed at a side of the touch electrodes away from the base substrate.
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公开(公告)号：US10861396B2
公开(公告)日：2020-12-08
申请号：US16463370
申请日：2018-12-19
Inventor： Mang Zhao , Lihua Zheng , Yong Tian
IPC: G09G3/3266 , G09G3/3275 , G09G3/36 , G02F1/1362 , G02F1/1368 , H01L27/32 , G09G3/20
Abstract: A driving method of a display panel is provided, including setting the first red, first green, first blue, second red, second green, and second blue multiplexed signals. In the 2i−1th multiplexing period, the charging time of the sub-pixels corresponding to the switching units controlled by the first red, the first green, and the first blue multiplexed signals is earlier than that controlled by the second red, the second green, and the second blue multiplexed signals. While In the 2ith multiplexing period, the charging time of the sub-pixels corresponding to the switching units controlled by the first red, the first green, and the first blue multiplexed signals is later than that controlled by the second red, the second green, and the second blue multiplexed signals. The method will eliminate the stripe feeling of the scream picture displayed on the display panel and so improve the display quality.
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公开(公告)号：US20200302846A1
公开(公告)日：2020-09-24
申请号：US16492137
申请日：2019-05-07
Inventor： Lihua ZHENG , Mang Zhao
IPC: G09G3/20
Abstract: A driving method for a display panel is through making the first demultiplexing signal, the second demultiplexing signal, the third demultiplexing signal, the fourth demultiplexing signal, the fifth demultiplexing signal and the sixth demultiplexing signal according to the first sequence generate the high-level pulse in the first image frame, and through making the first demultiplexing signal, the second demultiplexing signal, the third demultiplexing signal, the fourth demultiplexing signal, the fifth demultiplexing signal and the sixth demultiplexing signal according to the second sequence different from the first sequence generate the high-level pulse in the second image frame, thereby by adding the effect of the two image frames to eliminate stripes on the images displayed by the display panel to improve the display effect.
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公开(公告)号：US10600380B2
公开(公告)日：2020-03-24
申请号：US15548414
申请日：2017-04-18
IPC: G09G3/36 , H03K19/094 , G02F1/133 , G11C19/28
Abstract: A scanning driving circuit includes a scanning-level-signal-generation module and a scanning-signal-output-module. The scanning-level-signal-generation module is configured to input an (N−1)th stage scanning signal, an (N+1)th stage scanning signal, and a reset signal, generate a scanning level signal based on the (N−1)th stage scanning signal, the (N+1)th stage scanning signal, and the reset signal, and hold the scanning level signal. The scanning-signal-output-module, connected to the scanning-level-signal-generation module, is configured to input a clock signal, and configured to output a scanning signal based in the scanning level signal and the clock signal.
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