公开(公告)号：US11514707B2

公开(公告)日：2022-11-29

申请号：US16869314

申请日：2020-05-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： You-Cheng Jhang ,  Han-Zong Pan ,  Wei-Ding Wu ,  Jui-Chun Weng ,  Hsin-Yu Chen ,  Cheng-San Chou ,  Chin-Min Lin

IPC: G06V40/13 ,  G06F3/041 ,  G02B27/30 ,  H01L27/146 ,  G06F21/32

Abstract: Optical sensors and their making methods are described herein. In some embodiments, a described sensing apparatus includes: an image sensor; a collimator above the image sensor, wherein the collimator includes an array of apertures; and an optical filtering layer above the collimator, wherein the optical filtering layer is configured to filter a portion of light to be transmitted into the array of apertures.

公开(公告)号：US11448891B2

公开(公告)日：2022-09-20

申请号：US16655763

申请日：2019-10-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsin-Yu Chen ,  Chun-Peng Li ,  Chia-Chun Hung ,  Ching-Hsiang Hu ,  Wei-Ding Wu ,  Jui-Chun Weng ,  Ji-Hong Chiang ,  Yen-Chiang Liu ,  Jiun-Jie Chiou ,  Li-Yang Tu ,  Jia-Syuan Li ,  You-Cheng Jhang ,  Shin-Hua Chen ,  Lavanya Sanagavarapu ,  Han-Zong Pan ,  Hsi-Cheng Hsu

IPC: G02B27/30 ,  H01L27/146 ,  H01L31/0232

Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm−3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.

公开(公告)号：US10532925B2

公开(公告)日：2020-01-14

申请号：US16114521

申请日：2018-08-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shyh-Wei Cheng ,  Chih-Yu Wang ,  Hsi-Cheng Hsu ,  Hsin-Yu Chen ,  Ji-Hong Chiang ,  Jui-Chun Weng ,  Wei-Ding Wu

IPC: H01L49/02 ,  B81B7/00 ,  B81B3/00 ,  B81C1/00

Abstract: The present disclosure relates to a micro-electromechanical system (MEMs) package. In some embodiments, the MEMs package has a plurality of conductive interconnect layers disposed within a dielectric structure over an upper surface of a first substrate. A heating element is electrically coupled to a semiconductor device within the first substrate by one or more of the plurality of conductive interconnect layers. The heating element is vertically separated from the first substrate by the dielectric structure. A MEMs substrate is coupled to the first substrate and has a MEMs device. A hermetically sealed chamber surrounding the MEMs device is disposed between the first substrate and the MEMs substrate. An out-gassing material is disposed laterally between the hermetically sealed chamber and the heating element.

公开(公告)号：US10131536B2

公开(公告)日：2018-11-20

申请号：US15176365

申请日：2016-06-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shyh-Wei Cheng ,  Chih-Yu Wang ,  Hsi-Cheng Hsu ,  Hsin-Yu Chen ,  Ji-Hong Chiang ,  Jui-Chun Weng ,  Wei-Ding Wu

IPC: H01L29/84 ,  B81B7/00 ,  B81B3/00 ,  B81C1/00 ,  H01L49/02

Abstract: The present disclosure relates to a MEMs package having a heating element configured to adjust a pressure within a hermetically sealed chamber by inducing out-gassing of into the chamber, and an associated method. In some embodiments, the MEMs package has a CMOS substrate having one or more semiconductor devices arranged within a semiconductor body. A MEMs structure is connected to the CMOS substrate and has a micro-electromechanical (MEMs) device. The CMOS substrate and the MEMs structure form a hermetically sealed chamber abutting the MEMs device. A heating element is electrically coupled to the one or more semiconductor devices and is separated from the hermetically sealed chamber by an out-gassing layer arranged along an interior surface of the hermetically sealed chamber. By operating the heating element to cause the out-gassing layer to release a gas, the pressure of the hermetically sealed chamber can be adjusted after it is formed.

公开(公告)号：US09966427B2

公开(公告)日：2018-05-08

申请号：US15154027

申请日：2016-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shyh-Wei Cheng ,  Hung-Lin Chen ,  Jui-Chun Weng ,  Shiuan-Jeng Lin ,  Tian Sheng Lin ,  Yu-Jui Wu ,  Albion Pan ,  Bob Sun

IPC: H01L49/02 ,  H01L23/522 ,  H01L21/3213 ,  H01L21/311

CPC classification number: H01L28/75 ,  H01L21/31111 ,  H01L21/32139 ,  H01L23/5223

Abstract: A method for manufacturing a metal-insulator-metal (MIM) capacitor with a top electrode that is free of sidewall damage is provided. A bottom electrode layer is formed with a first material. An inter-electrode dielectric layer is formed over the bottom electrode layer. A top electrode layer is formed over the inter-electrode dielectric layer and without the first material. A first etch is performed into the top electrode layer and the inter-electrode dielectric layer to form a top electrode. A second etch into the bottom electrode layer to form a bottom electrode. The present application is also directed towards a MIM capacitor resulting from performing the method.

公开(公告)号：US20170330931A1

公开(公告)日：2017-11-16

申请号：US15154027

申请日：2016-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shyh-Wei Cheng ,  Hung-Lin Chen ,  Jui-Chun Weng ,  Shiuan-Jeng Lin ,  Tian Sheng Lin ,  Yu-Jui Wu ,  Albion Pan ,  Bob Sun

IPC: H01L49/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L23/522

CPC classification number: H01L28/75 ,  H01L21/31111 ,  H01L21/32139 ,  H01L23/5223

Abstract: A method for manufacturing a metal-insulator-metal (MIM) capacitor with a top electrode that is free of sidewall damage is provided. A bottom electrode layer is formed with a first material. An inter-electrode dielectric layer is formed over the bottom electrode layer. A top electrode layer is formed over the inter-electrode dielectric layer and without the first material. A first etch is performed into the top electrode layer and the inter-electrode dielectric layer to form a top electrode. A second etch into the bottom electrode layer to form a bottom electrode. The present application is also directed towards a MIM capacitor resulting from performing the method.