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    FRAGMENT SHADERS PERFORM VERTEX SHADER COMPUTATIONS
    21.
    发明申请
    FRAGMENT SHADERS PERFORM VERTEX SHADER COMPUTATIONS 审中-公开

    公开(公告)号：US20190035050A1

    公开(公告)日：2019-01-31

    申请号：US16145003

    申请日：2018-09-27

    Applicant: Sony Interactive Entertainment Inc.

    Inventor： Mark Evan Cerny ,  David Simpson ,  Jason Scanlin

    IPC: G06T1/20 ,  G06T15/00 ,  G06T1/60

    CPC classification number: G06T1/20 ,  G06T1/60 ,  G06T15/005

    Abstract: Graphics processing may include implementing a vertex shader and a pixel shader with the GPU. Vertex indices output from a vertex shader may be written to a cache. The vertex indices written to the cache may be accessed with the pixel shader and vertex parameter values associated with the vertex indices may be accessed from a memory unit with the pixel shader. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

    Graphics processing hardware for using compute shaders as front end for vertex shaders
    22.
    发明授权
    Graphics processing hardware for using compute shaders as front end for vertex shaders 有权

    公开(公告)号：US10134102B2

    公开(公告)日：2018-11-20

    申请号：US14297290

    申请日：2014-06-05

    Applicant: Sony Interactive Entertainment Inc. ,  Advanced Micro Devices, Inc.

    Inventor： Mark Evan Cerny ,  David Simpson ,  Jason Scanlin ,  Michael Mantor

    IPC: G06T1/20 ,  G06T15/00 ,  G06T1/60

    Abstract: A GPU is configured to read and process data produced by a compute shader via the one or more ring buffers and pass the resulting processed data to a vertex shader as input. The GPU is further configured to allow the compute shader and vertex shader to write through a cache. Each ring buffer is configured to synchronize the compute shader and the vertex shader to prevent processed data generated by the compute shader that is written to a particular ring buffer from being overwritten before the data is accessed by the vertex shader. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

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