公开(公告)号：US20230422501A1

公开(公告)日：2023-12-28

申请号：US18190876

申请日：2023-03-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon KWON ,  Beomjin PARK ,  Boun YOON

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

CPC classification number: H10B43/27 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

Abstract: A semiconductor device includes a substrate, circuit devices on the substrate, lower interconnection lines electrically connected to the circuit devices, a peripheral region insulating layer covering the lower interconnection lines, a source structure on the peripheral region insulating layer, gate electrodes stacked and spaced apart from each other in a first direction on the source structure, channel structures penetrating through the gate electrodes and each including a channel layer, contact plugs penetrating through the gate electrodes and the source structure, extending in the first direction, and connected to a portion of the lower interconnection lines, and spacer layers between the contact plugs and the source structure and including a material different from a material of the insulating layer in the peripheral region, wherein each of the spacer layers has a first width on an upper surface and has a second width greater than the first width on a lower surface.

公开(公告)号：US20230373058A1

公开(公告)日：2023-11-23

申请号：US18083007

申请日：2022-12-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghoon KWON ,  Hyojung KIM

IPC: B24B37/34 ,  B24B37/10 ,  B24B7/22 ,  H01L21/67 ,  H01L21/687 ,  B08B3/02

CPC classification number: B24B37/34 ,  B24B37/107 ,  B24B7/228 ,  H01L21/67051 ,  H01L21/68764 ,  B08B3/022

Abstract: A semiconductor substrate grinding apparatus including a chuck table configured to mount and fix a semiconductor substrate, so that a back side of the semiconductor substrate faces upwardly and rotates in one direction; a grinding wheel on the chuck table configured to grind the back side of the semiconductor substrate; a cleaning liquid supplier on the chuck table, spaced apart from the grinding wheel, and configured to supply a cleaning liquid to the back side of the semiconductor substrate for cleaning by-products generated by grinding the semiconductor substrate; a slurry supplier on the chuck table, adjacent to the cleaning liquid supplier, and configured to supply a slurry to the back side of the semiconductor substrate; and a polishing wheel on the chuck table, spaced apart from the slurry supplier, and configured to perform chemical mechanical polishing on the back side of the semiconductor substrate using the slurry.

公开(公告)号：US20230328987A1

公开(公告)日：2023-10-12

申请号：US18150415

申请日：2023-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon KWON ,  Boun YOON ,  Kihoon JANG

IPC: H10B43/27 ,  H10B43/35 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H01L23/528 ,  H10B43/10

CPC classification number: H10B43/27 ,  H01L23/5283 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

Abstract: A semiconductor device includes a first semiconductor structure including a first substrate and a second semiconductor structure on the first semiconductor structure. The second semiconductor structure includes gate electrodes stacked on the second substrate, interlayer insulating layers alternately stacked with the gate electrodes, through-insulating regions passing through the gate electrodes in a second region, a capping insulating layer covering the gate electrodes and the interlayer insulating layers, an upper insulating layer on the capping insulating layer, channel structures passing through the capping insulating layer and the gate electrodes in a first region, upper contact plugs passing through the upper insulating layer, bit lines on the upper insulating layer, first contact plugs passing through the capping insulating layer, and conductive patterns including second contact plugs passing through each of the through-insulating regions in the second region. The conductive patterns include connection portions integral with the second contact plugs.

公开(公告)号：US20220384477A1

公开(公告)日：2022-12-01

申请号：US17574740

申请日：2022-01-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghoon KWON ,  Chungki MIN

IPC: H01L27/11582 ,  H01L23/535 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11573

Abstract: A semiconductor device includes a peripheral circuit structure including a lower substrate, a plurality of circuits formed on the lower substrate, and a plurality of wiring layers connected to the plurality of circuits, an upper substrate covering the peripheral circuit structure and including a through opening, a memory stack structure including a plurality of gate lines, a memory cell contact passing through at least one of the plurality of gate lines to contact one gate line from among the plurality of gate lines, the memory cell contact extending to the peripheral circuit structure through the through opening and being configured to be electrically connected to a first wiring layer from among the plurality of wiring layers, and a plurality of dummy channel structures passing through at least one of the plurality of gate lines to extend to the peripheral circuit structure through the through opening.