Abstract:
A display device includes pixels respectively arranged in areas defined by gate lines and data lines, a gate driver that drives the gate lines in response to a gate pulse signal, a data driver that drives the data lines in response to a clock signal and a data signal, and a timing controller that applies the clock signal and the data signal to the data driver and the gate pulse signal to the gate driver in response to an image signal and a control signal. The timing controller periodically changes a pulse width of each of the gate pulse signal and the clock signal.
Abstract:
A display device is provided. The display device includes pixels, a data driver, a signal controller, a data processor. The data driver is configured to apply a first data voltage to a first pixel. The signal controller is configured to transfer an image data signal and a data control signal for controlling an operation of the data driver. The data processor is configured to detect a first region including a moving in a first image signal, to apply a first dynamic capacitance control (DCC) to the first region, to apply a second DCC to a second region other than the moving pattern region, to generate the second image signal by combining the first region to which the first DCC is applied and the second region to which the second DCC is applied, and to transfer the second image signal to the signal controller.
Abstract:
An image processing method includes receiving an RGB data, converting the RGB data to an HSV data configured to include hue, saturation, and value compensating for the HSV data on a basis of a hue data of the HSV data, and converting the compensated HSV data to a compensated RGB data. The compensating of the HSV data includes reading out a compensation data corresponding to the hue data from a look-up table and compensating for the HSV data using the compensation data. The data are compensated on the basis of the hue in the HSV color space and the saturation and value are preserved, and thus the image, e.g., the memory color like the skin color, may be prevented from being distorted.
Abstract:
Provided is a gate driving circuit comprising an N-th stage and an N+1-th stage. The N-th stage outputs an N-th scan gate signal based on an N-th scan clock signal, a voltage of a QN node, and a voltage of a QBN node and to output an N-th carry signal based on an N-th carry clock signal, the voltage of the QN node, and the voltage of the QBN node. The N+1-th stage outputs an N+1-th scan gate signal based on an N+1-th scan clock signal, a voltage of a QN+1 node, and the voltage of the QBN node and an N+1-th carry signal based on an N+1-th carry clock signal, the voltage of the QN+1 node, and the voltage of the QBN node. The N-th stage and the N+1-th stage share an inverting circuit. The inverting circuit controls the QBN node based on a third signal. N is a positive integer.
Abstract:
A light emitting display device including: a first pixel including a first lower storage electrode, a first gate electrode of a first driving transistor, and a first upper storage electrode; and a second pixel provided near the first pixel, and including a second lower storage electrode, a second gate electrode of a second driving transistor, and a second upper storage electrode. In a plan view, the first gate electrode and the second gate electrode have first sides facing each other, the first side of the first gate electrode is positioned inside a border of the first lower storage electrode or the first upper storage electrode in a plan view, and the first side of the second gate electrode is positioned inside a border of the second lower storage electrode or the second upper storage electrode in a plan view.
Abstract:
A pixel circuit including an organic light emitting diode, a first transistor configured to drive the organic light emitting diode, a second transistor electrically connected between a gate node of the first transistor and a data line, a third transistor electrically connected between a source node of the first transistor and an initialization voltage line and a storage capacitor electrically connected between the gate node and the source node of the first transistor. In a data writing period in which the storage capacitor is charged with electric charges, a turn-off time of the third transistor lags compared to a turn-off time of the second transistor.
Abstract:
A display apparatus includes a display panel displaying an image and including a gate line and a data line, a gate driver outputting a gate signal to the gate line, a data driver outputting a data signal to the data line, a timing controller outputting a vertical start signal and a gate clock, and a gate clock signal compensator generating an inner clock signal based on the vertical start signal, selecting one of the gate clock signal and the inner clock signal based on a comparison result of a time difference between the gate clock signal and the inner clock signal and a reference time which corresponds to tolerance of jitter of the gate clock signal, increasing a level of the selected clock signal, and outputting the increased clock signal to the gate driver, where the gate driver generates the gate signal based on the increased clock signal.
Abstract:
A display apparatus includes a display panel, a gate driver, and a gate driving control circuit. The gate driver is connected to the display panel, and generates gate signals for driving the display panel using a gate clock signal. The gate driving control circuit generates the gate clock signal using a gate on voltage and a gate off voltage, determines whether an operation environment is an abnormal temperature environment by comparing a first feedback gate signal with a second feedback gate signal, and adjusts a voltage level of the gate clock signal in the abnormal temperature environment. The first feedback gate signal is retrieved from the display panel while a first frame image is displayed on the display panel. The second feedback gate signal is retrieved from the display panel while a second frame image subsequent to the first frame image is displayed on the display panel.
Abstract:
A display device and a driving method thereof are disclosed. In one aspect, the display device includes a display panel including a plurality of pixels, a data driver transferring data voltages to a plurality of data lines, and a gate driver transferring gate signals to a plurality of gate lines. The display device also includes a signal controller controlling the data driver and the gate driver and including a signal processor. The signal processor includes a memory and a coupling index calculator calculating a coupling index which represents a coupling degree between adjacent rows. The signal processor compensates for the input image signal to generate a compensated image signal based at least in part on the coupling index.
Abstract:
A display apparatus is provided. The display apparatus includes a display panel including a plurality of display blocks; a driving circuit configured to control an image to be displayed on the display panel; and a timing controller configured to control the driving circuit in response to an image signal and a control signal and to provide a data signal to the driving circuit, wherein the timing controller comprises a memory storing gamma correction values corresponding to gray scales of the image signal, and wherein the timing controller outputs the data signal, and the data signal is obtained by correcting the image signal using the gamma correction values.