公开(公告)号：US20230011885A1

公开(公告)日：2023-01-12

申请号：US17933470

申请日：2022-09-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kyunghyun BAEK ,  Seok Je SEONG ,  Hyeonsik KIM ,  Yoonjee SHIN ,  Jae Hyun LEE ,  Woo Ho JEONG ,  Yoon-Jong CHO

IPC: H01L27/32 ,  H01L29/786

Abstract: A display panel includes two or more gate layers including a plurality of gate patterns extending in a first direction and one or more source-drain layers including a plurality of source-drain patterns extending in a second direction crossing the first direction. The gate patterns of the two or more gate layers are curved or bent along a hole surrounding area corresponding to a periphery of a hole in an active area. The source-drain patterns of the one or more source-drain layers are curved or bent along the hole surrounding area. The gate patterns of at least one of the two or more gate layers overlap the source-drain patterns of at least one of the one or more source-drain layers in a thickness direction of the display panel in the hole surrounding area.

公开(公告)号：US20220190165A1

公开(公告)日：2022-06-16

申请号：US17685733

申请日：2022-03-03

Applicant: Samsung Display Co., LTD.

Inventor： Yun Sik JOO ,  Seok Je SEONG ,  Kyung Hyun BAEK ,  Hyeon Woo SHIN

IPC: H01L29/786 ,  G02F1/1362 ,  G09G3/3233

Abstract: A display device includes a first transistor including a gate electrode, a second transistor including a lower gate electrode, an upper gate electrode, and a first end portion electrically connected to an end portion of the first transistor, a lower gate signal line extending in a first direction, an upper gate signal line disposed on the lower gate signal line and extending in a first direction, and a first connection pattern disposed on the upper gate signal line, electrically connecting the gate electrode and a second end portion of the second transistor, and intersecting the lower gate signal line and the upper gate signal line. An entirety of the upper gate signal line overlaps a part of the lower gate signal line in an overlapping area in which the lower gate signal line or the upper gate signal line overlaps the first connection pattern.

公开(公告)号：US20170185203A1

公开(公告)日：2017-06-29

申请号：US15383976

申请日：2016-12-19

Applicant: Samsung Display Co., Ltd.

Inventor： Seok Je SEONG

IPC: G06F3/041 ,  H01L27/32 ,  H01L51/52 ,  G06F3/044

CPC classification number: G06F3/0412 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04111 ,  H01L27/323

Abstract: A display device may include a display part, a substrate, a first spacer, a second spacer, a first touch electrode, and a second touch electrode. The display part may emit, transmit, and/or reflect light. The substrate may overlap the display part and may receive a touch. The first spacer and the second spacer may be formed of a spacer material and may be positioned between the display part and the substrate to maintain a distance between the display part and the substrate. No intervening spacer analogous to the first spacer or the second spacer may be positioned between the first spacer and the second spacer. The first touch electrode may be positioned between the first spacer and the second spacer in a plan view of the display device. The second touch electrode may intersect the first touch electrode in the plan view of the display device.

公开(公告)号：US20240107840A1

公开(公告)日：2024-03-28

申请号：US18526207

申请日：2023-12-01

Applicant: Samsung Display Co., LTD.

Inventor： Se Wan SON ,  Moo Soon KO ,  Kyung Hyun BAEK ,  Seok Je SEONG ,  Jae Hyun LEE ,  Jeong-Soo LEE ,  Ji Seon LEE ,  Yoon-Jong CHO

IPC: H10K59/131 ,  H10K59/124 ,  H10K59/126

CPC classification number: H10K59/131 ,  H10K59/124 ,  H10K59/126 ,  G09G3/32 ,  G09G2300/0809

Abstract: A display device includes a first semiconductor layer disposed on a substrate; a first insulating layer disposed on the first semiconductor layer; a scan line disposed on the first insulating layer; a second insulating layer on the scan line; an inverted scan line on the second insulating layer; a third insulating layer disposed on the inverted scan line; a second semiconductor layer disposed on the third insulating layer; a fourth insulating layer disposed on the second semiconductor layer; an initializing voltage line disposed on the fourth insulating layer and overlapping the scan line; a first transistor including a channel disposed in the first semiconductor layer and receiving a gate signal through the scan line; and a second transistor including a channel disposed in the second semiconductor layer and receiving a gate signal through the inverted scan line.

公开(公告)号：US20230419886A1

公开(公告)日：2023-12-28

申请号：US18458526

申请日：2023-08-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jin Sung AN ,  Seok Je SEONG ,  Ji Seon LEE ,  Se Wan SON

IPC: G09G3/32 ,  H01L33/62 ,  H01L33/16

CPC classification number: G09G3/32 ,  H01L33/62 ,  H01L33/16 ,  G09G2310/0267 ,  G09G2300/0426 ,  G09G2310/0275

Abstract: A display device includes a substrate, a polycrystalline semiconductor layer including a channel of a driving transistor, and a channel of a seventh transistor, a gate electrode of the driving transistor overlapping the channel thereof, a gate electrode of the seventh transistor overlapping the channel thereof, an oxide semiconductor layer including a channel of a fourth transistor, a gate electrode thereof overlapping the channel of the fourth transistor, a first initialization voltage line connected to a first electrode of the fourth transistor, the first initialization voltage line and the gate electrode of the fourth transistor being position on a same layer, and a second initialization voltage line connected to a second electrode of the seventh transistor, the second initialization voltage line and the first initialization voltage line being positioned on different layers from each other.

公开(公告)号：US20230411404A1

公开(公告)日：2023-12-21

申请号：US18239470

申请日：2023-08-29

Applicant: Samsung Display Co., Ltd.

Inventor： Jin Sung AN ,  Seok Je SEONG ,  Seong Jun LEE ,  Ji Seon LEE

IPC: H01L27/12

CPC classification number: H01L27/124 ,  G09G3/3291

Abstract: A display device includes a first active pattern, a first conductive pattern including a gate electrode overlapping the first active pattern, a first gate line overlapping the first active pattern and extending in a first direction, and a second gate line extending in the first direction, a second conductive pattern disposed on the first conductive pattern and including a third gate line extending in the first direction and a fourth gate line extending in the first direction, a second active pattern disposed on the second conductive pattern and including a material different from a material of the first active pattern, and a third conductive pattern disposed on the second active pattern and including a first upper electrode overlapping the third gate line and connected to the third gate line, and a second upper electrode overlapping the fourth gate line and connected to the fourth gate line.

公开(公告)号：US20230397477A1

公开(公告)日：2023-12-07

申请号：US18118865

申请日：2023-03-08

Applicant: Samsung Display Co., LTD.

Inventor： Chang Ho YI ,  Hyun Min CHO ,  Jung Woo HA ,  Tetsuhiro TANAKA ,  Seok Je SEONG

IPC: H01L51/00 ,  H01L29/423 ,  H01L29/786

CPC classification number: H10K59/8792 ,  H01L29/42384 ,  H10K59/1213 ,  H10K59/1216 ,  H01L29/78633 ,  H01L29/7869

Abstract: A display device includes a semiconductor layer on an opposite side to a light-blocking layer, the semiconductor layer including an active layer overlapping the light-blocking layer, a first gate insulator on an opposite side to a buffer film with the active layer therebetween, and a first gate electrode on an opposite side to the active layer with the first gate insulator therebetween, a side surface of the first gate insulator includes a first inclined portion contacting a first surface of the semiconductor layer, and a second inclined portion contacting the first inclined portion and the first gate electrode, and a first angle between the first surface of the semiconductor layer and the first inclined portion is less than a second angle between the first surface of the semiconductor layer and the second inclined portion.

公开(公告)号：US20230154416A1

公开(公告)日：2023-05-18

申请号：US18093515

申请日：2023-01-05

Applicant: Samsung Display Co., Ltd.

Inventor： Ji Seon LEE ,  Jin Sung AN ,  Seok Je SEONG ,  Seong Jun LEE ,  Se Wan SON

IPC: G09G3/3291

CPC classification number: G09G3/3291 ,  G09G2300/0426 ,  H10K59/1213

Abstract: A display device includes a substrate, a first active pattern, a first gate electrode, a second active pattern, a second gate electrode, a first connecting pattern, and a second connecting pattern. The first connecting pattern is disposed on the second active pattern and is electrically connected to the first gate electrode, and the second connecting pattern is disposed on the first connecting pattern and is electrically connected to the first connecting pattern and the second active pattern.

公开(公告)号：US20210296502A1

公开(公告)日：2021-09-23

申请号：US17070503

申请日：2020-10-14

Applicant: Samsung Display Co., LTD.

Inventor： Yun Sik JOO ,  Seok Je SEONG ,  Kyung Hyun BAEK ,  Hyeon Woo SHIN

IPC: H01L29/786 ,  G02F1/1362 ,  G09G3/3233

Abstract: A display device includes a first transistor including a gate electrode, a second transistor including a lower gate electrode, an upper gate electrode, and a first end portion electrically connected to an end portion of the first transistor, a lower gate signal line extending in a first direction, an upper gate signal line disposed on the lower gate signal line and extending in a first direction, and a first connection pattern disposed on the upper gate signal line, electrically connecting the gate electrode and a second end portion of the second transistor, and intersecting the lower gate signal line and the upper gate signal line. An entirety of the upper gate signal line overlaps a part of the lower gate signal line in an overlapping area in which the lower gate signal line or the upper gate signal line overlaps the first connection pattern.

公开(公告)号：US20210280127A1

公开(公告)日：2021-09-09

申请号：US17187996

申请日：2021-03-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JIN SUNG AN ,  Seok Je SEONG ,  Ji Seon LEE ,  Se Wan SON

IPC: G09G3/32 ,  H01L33/62 ,  H01L33/16

Abstract: A display device includes a substrate, a polycrystalline semiconductor layer including a channel of a driving transistor, and a channel of a seventh transistor, a gate electrode of the driving transistor overlapping the channel thereof, a gate electrode of the seventh transistor overlapping the channel thereof, an oxide semiconductor layer including a channel of a fourth transistor, a gate electrode thereof overlapping the channel of the fourth transistor, a first initialization voltage line connected to a first electrode of the fourth transistor, the first initialization voltage line and the gate electrode of the fourth transistor being position on a same layer, and a second initialization voltage line connected to a second electrode of the seventh transistor, the second initialization voltage line and the first initialization voltage line being positioned on different layers from each other.