公开(公告)号：US20100264401A1

公开(公告)日：2010-10-21

申请号：US12673476

申请日：2008-08-13

申请人： Vinod Adivarahan ,  Asif Khan ,  Rubina Khan

发明人： Vinod Adivarahan ,  Asif Khan ,  Rubina Khan

IPC分类号： H01L33/04 ,  H01L33/00

CPC分类号： H01L33/32 ,  H01L27/156 ,  H01L33/12

摘要： An ultra-violet light-emitting diode (LED) array, 12, and method for fabricating same with an AlInGaN multiple-quantum-well active region, 500, exhibiting stable cw-powers. The LED includes a template, 10, with an ultraviolet light-emitting array structure on it. The template includes a first buffer layer, 321, then a second buffer layer, 421, on the first preferably with a strain-relieving layer in both buffer layers. Next there is a semiconductor layer having a first type of conductivity, 500, followed by a layer providing a quantum-well region, 600, with an emission spectrum ranging from 190 nm to 369 nm. Another semiconductor layer having a second type of conductivity is applied next, 800. A first metal contact, 980, is a charge spreading layer in electrical contact with the first layer and between the array of LED's. A second contact, 990, is applied to the semiconductor layer having the second type of conductivity, to complete the LED.

摘要翻译： 一种紫外发光二极管（LED）阵列12及其制造方法，具有稳定的cw功率的AlInGaN多量子阱有源区500。 LED包括一个具有紫外发光阵列结构的模板10。 模板包括第一缓冲层321，然后第二缓冲层421，优选地在两个缓冲层中具有应变消除层。 接下来，存在具有第一类型导电性的半导体层500，随后是提供量子阱区域的层600，发射光谱范围为190nm至369nm。 接下来施加另一种具有第二类导电性的半导体层，800.第一金属触点980是与第一层电连接并在LED阵列之间的电荷扩散层。 第二触点990被施加到具有第二类导电性的半导体层，以完成LED。

公开(公告)号：US20100187545A1

公开(公告)日：2010-07-29

申请号：US12442953

申请日：2007-11-13

申请人： Asif Khan ,  Vinod Adivarahan

发明人： Asif Khan ,  Vinod Adivarahan

IPC分类号： H01L33/02 ,  B32B3/10 ,  H01L21/22 ,  H01L21/20

CPC分类号： H01L29/0847 ,  H01L21/2258 ,  H01L29/0891 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787 ,  H01L33/025 ,  H01L33/325 ,  Y10T428/24802

摘要： The present invention is generally directed to methods of selectively doping a substrate and the resulting selectively doped substrates. The methods include doping an epilayer of a substrate with the selected doping material to adjust the conductivity of either the epilayers grown over a substrate or the substrate itself. The methods utilize lithography to control the location of the doped regions on the substrate. The process steps can be repeated to form a cyclic method of selectively doping different areas of the substrate with the same or different doping materials to further adjust the properties of the resulting substrate.

摘要翻译： 本发明一般涉及选择性掺杂衬底和所得到的选择性掺杂衬底的方法。 所述方法包括用所选择的掺杂材料掺杂衬底的外延层以调节在衬底或衬底本身上生长的外延层的导电性。 该方法利用光刻来控制衬底上的掺杂区域的位置。 可以重复工艺步骤以形成用相同或不同的掺杂材料选择性掺杂衬底的不同区域以进一步调节所得衬底的性质的循环方法。

公开(公告)号：US08354663B2

公开(公告)日：2013-01-15

申请号：US12673476

申请日：2008-08-13

申请人： Vinod Adivarahan ,  Asif Khan ,  Rubina Khan

发明人： Vinod Adivarahan ,  Asif Khan ,  Rubina Khan

IPC分类号： H01L29/06

CPC分类号： H01L33/32 ,  H01L27/156 ,  H01L33/12

摘要： An ultra-violet light-emitting diode (LED) array, 12, and method for fabricating same with an AlInGaN multiple-quantum-well active region, 500, exhibiting stable cw-powers. The LED includes a template, 10, with an ultraviolet light-emitting array structure on it. The template includes a first buffer layer, 321, then a second buffer layer, 421, on the first preferably with a strain-relieving layer in both buffer layers. Next there is a semiconductor layer having a first type of conductivity, 500, followed by a layer providing a quantum-well region, 600, with an emission spectrum ranging from 190 nm to 369 nm. Another semiconductor layer having a second type of conductivity is applied next, 800. A first metal contact, 980, is a charge spreading layer in electrical contact with the first layer and between the array of LED's. A second contact, 990, is applied to the semiconductor layer having the second type of conductivity, to complete the LED.

摘要翻译： 一种紫外发光二极管（LED）阵列12及其制造方法，具有稳定的cw功率的AlInGaN多量子阱有源区500。 LED包括一个具有紫外发光阵列结构的模板10。 模板包括第一缓冲层321，然后第二缓冲层421，优选地在两个缓冲层中具有应变消除层。 接下来，存在具有第一类型导电性的半导体层500，随后是提供量子阱区域的层600，发射光谱范围为190nm至369nm。 接下来施加另一种具有第二类导电性的半导体层，800.第一金属触点980是与第一层电连接并在LED阵列之间的电荷扩散层。 第二触点990被施加到具有第二类导电性的半导体层，以完成LED。

公开(公告)号：US09059081B2

公开(公告)日：2015-06-16

申请号：US12442953

申请日：2007-11-13

申请人： Asif Khan ,  Vinod Adivarahan

发明人： Asif Khan ,  Vinod Adivarahan

IPC分类号： H01L21/22 ,  H01L21/225 ,  H01L29/08 ,  H01L29/66 ,  H01L29/778 ,  H01L29/20 ,  H01L33/02 ,  H01L33/32

CPC分类号： H01L29/0847 ,  H01L21/2258 ,  H01L29/0891 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787 ,  H01L33/025 ,  H01L33/325 ,  Y10T428/24802

摘要： The present invention is generally directed to methods of selectively doping a substrate and the resulting selectively doped substrates. The methods include doping an epilayer of a substrate with the selected doping material to adjust the conductivity of either the epilayers grown over a substrate or the substrate itself. The methods utilize lithography to control the location of the doped regions on the substrate. The process steps can be repeated to form a cyclic method of selectively doping different areas of the substrate with the same or different doping materials to further adjust the properties of the resulting substrate.

摘要翻译： 本发明一般涉及选择性掺杂衬底和所得到的选择性掺杂衬底的方法。 所述方法包括用所选择的掺杂材料掺杂衬底的外延层以调节在衬底或衬底本身上生长的外延层的导电性。 该方法利用光刻来控制衬底上的掺杂区域的位置。 可以重复工艺步骤以形成用相同或不同的掺杂材料选择性地掺杂衬底的不同区域以进一步调节所得衬底的性质的循环方法。

公开(公告)号：US08372697B2

公开(公告)日：2013-02-12

申请号：US11800712

申请日：2007-05-07

申请人： Asif Khan ,  Vinod Adivarahan

发明人： Asif Khan ,  Vinod Adivarahan

IPC分类号： H01L21/20

CPC分类号： H01L21/02164 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/518

摘要： Novel silicon dioxide and silicon nitride deposition methods are generally disclosed. In one embodiment, the method includes depositing silicon on the surface of a substrate having a temperature of between about 65° C. and about 350° C. The heated substrate is exposed to a silicon source that is substantially free from an oxidizing agent. The silicon on the surface is then oxidized with an oxygen source that is substantially free from a silicon source. As a result of oxidizing the silicon, a silicon oxide layer forms on the surface of the substrate. Alternatively, or in additionally, a nitrogen source can be provided to produce silicon nitride on the surface of the substrate.

摘要翻译： 通常公开了新的二氧化硅和氮化硅沉积方法。 在一个实施例中，该方法包括在温度在约65℃至约350℃之间的衬底的表面上沉积硅。加热的衬底暴露于基本上不含氧化剂的硅源。 然后用基本上不含硅源的氧源氧化表面上的硅。 作为氧化硅的结果，在衬底的表面上形成氧化硅层。 或者，或另外，可以提供氮源以在衬底的表面上产生氮化硅。

公开(公告)号：US20120034718A1

公开(公告)日：2012-02-09

申请号：US13226806

申请日：2011-09-07

申请人： Asif Khan

发明人： Asif Khan

IPC分类号： H01L33/48 ,  H01L33/22

CPC分类号： H01L33/06 ,  B82Y20/00 ,  H01L33/0079 ,  H01L33/32

摘要： A vertical geometry light emitting diode with a strain relieved superlattice layer on a substrate comprising doped AlXInYGa1-X-YN. A first doped layer is on the strain relieved superlattice layer AlXInYGa1-X-YN and the first doped layer has a first conductivity. A multilayer quantum well is on the first doped layer comprising alternating layers quantum wells and barrier layers. The multilayer quantum well terminates with a barrier layer on each side thereof. A second doped layer is on the quantum well wherein the second doped layer comprises AlXInYGa1-X-YN and said second doped layer has a different conductivity than said first doped layer. A contact layer is on the third doped layer and the contact layer has a different conductivity than the third doped layer. A metallic contact is in a vertical geometry orientation.

摘要翻译： 在包含掺杂的AlXInYGa1-X-YN的衬底上具有应变消除的超晶格层的垂直几何形状发光二极管。 第一掺杂层位于应变消除的超晶格层AlXInYGa1-X-YN上，第一掺杂层具有第一导电性。 多层量子阱在第一掺杂层上，包括交替层量子阱和势垒层。 多层量子阱在其每一侧终止阻挡层。 第二掺杂层在量子阱上，其中第二掺杂层包含AlXInYGa1-X-YN，而所述第二掺杂层具有与所述第一掺杂层不同的导电性。 接触层在第三掺杂层上，并且接触层具有与第三掺杂层不同的导电性。 金属接触处于垂直几何取向。

公开(公告)号：US07706372B2

公开(公告)日：2010-04-27

申请号：US11379264

申请日：2006-04-19

申请人： Christopher J. Pettey ,  Asif Khan ,  Annette Pagan ,  Richard E. Pekkala ,  Robert Haskell Utley

发明人： Christopher J. Pettey ,  Asif Khan ,  Annette Pagan ,  Richard E. Pekkala ,  Robert Haskell Utley

IPC分类号： H04L12/28 ,  H04L12/56

CPC分类号： G06F13/12

摘要： An apparatus and method is provided for allowing I/O devices to be shared and/or partitioned among a plurality of processing complexes within the load/store fabric of each of the processing complexes without requiring modification to the operating system or driver software of the processing complexes. The apparatus and method includes a switch for selectively coupling each of the processing complexes to one or more shared I/O devices. The apparatus and method further includes placing information within packets transmitted between the switch and the I/O devices to identify which of the processing complexes the packets are associated with. The invention further includes an apparatus and method within the shared I/O devices to allow the shared I/O devices to service each of the processing complexes independently.

公开(公告)号：US07620066B2

公开(公告)日：2009-11-17

申请号：US11235513

申请日：2005-09-26

申请人： Christopher J. Pettey ,  Asif Khan ,  Annette Pagan ,  Richard E. Pekkala ,  Robert Haskell Utley

发明人： Christopher J. Pettey ,  Asif Khan ,  Annette Pagan ,  Richard E. Pekkala ,  Robert Haskell Utley

IPC分类号： H04J3/22

CPC分类号： H04L67/24 ,  H04L49/351 ,  H04L49/356

摘要： An apparatus and method is provided for allowing I/O devices to be shared and/or partitioned among a plurality of processing complexes within the load/store fabric of each of the processing complexes without requiring modification to the operating system or driver software of the processing complexes. The apparatus and method includes a switch for selectively coupling each of the processing complexes to one or more shared I/O devices. The apparatus and method further includes placing information within packets transmitted between the switch and the I/O devices to identify which of the processing complexes the packets are associated with. The invention further includes an apparatus and method within the shared I/O devices to allow the shared I/O devices to service each of the processing complexes independently.

摘要翻译： 提供了一种用于允许在每个处理复合体的加载/存储结构内的多个处理复合体之间共享和/或分区I / O设备的装置和方法，而不需要修改处理的操作系统或驱动程序软件 复合物。 该装置和方法包括用于将每个处理复合体选择性地耦合到一个或多个共享I / O设备的开关。 该装置和方法还包括将信息放置在交换机和I / O设备之间传输的分组内，以识别分组与哪个处理复合体相关联。 本发明还包括共享I / O设备内的装置和方法，以允许共享I / O设备独立地为每个处理复合体提供服务。

公开(公告)号：US20050147117A1

公开(公告)日：2005-07-07

申请号：US11048393

申请日：2005-01-31

申请人： Christopher Pettey ,  Asif Khan ,  Annette Pagan ,  Richard Pekkala ,  Robert Utley

发明人： Christopher Pettey ,  Asif Khan ,  Annette Pagan ,  Richard Pekkala ,  Robert Utley

IPC分类号： H04L12/28

CPC分类号： H04L49/356

摘要： An apparatus and method are provided that enable I/O devices to be shared among multiple operating system domains. The apparatus includes a first plurality of I/O ports, a second I/O port, and a plurality of port initialization logic elements. The first plurality of I/O ports is coupled to a plurality of operating system domains through a load-store fabric. Each of the first plurality of I/O ports routes transactions between the plurality of operating system domains and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint. The first shared input/output endpoint is configured to request/complete the transactions for each of the plurality of operating system domains. One of the plurality of port initialization logic elements is coupled to the second I/O port and remaining ones of the plurality of port initialization logic elements are each coupled to a corresponding one of the first plurality of I/O ports. The plurality of port initialization logic elements is configured to initialize corresponding links between each of the plurality of operating system domains and the switching apparatus, and between the first shared input/output endpoint and the switching apparatus, to support the transactions, where each of the plurality of port initialization logic elements automatically configures a corresponding polarity for each of the first plurality of I/O ports and the second I/O port, and where the corresponding polarity is in a default polarity prior to being configured.

摘要翻译： 提供了一种能够在多个操作系统域之间共享I / O设备的装置和方法。 该装置包括第一多个I / O端口，第二I / O端口和多个端口初始化逻辑元件。 第一组多个I / O端口通过加载存储架构耦合到多个操作系统域。 第一多个I / O端口中的每一个在多个操作系统域和交换设备之间路由事务。 第二个I / O端口耦合到第一个共享输入/输出端点。 第一共享输入/输出端点被配置为请求/完成多个操作系统域中的每一个的事务。 多个端口初始化逻辑元件中的一个耦合到第二I / O端口，并且多个端口初始化逻辑元件中的其余端口初始化逻辑元件中的每一个耦合到第一多个I / O端口中的对应的一个。 多个端口初始化逻辑元件被配置为初始化多个操作系统域和交换设备中的每一个之间以及第一共享输入/输出端点与交换设备之间的对应链路，以支持交易，其中， 多个端口初始化逻辑元件自动地配置第一多个I / O端口和第二I / O端口中的每一个的相应极性，并且其中在配置之前相应的极性处于默认极性。

公开(公告)号：US20050094565A1

公开(公告)日：2005-05-05

申请号：US10699037

申请日：2003-10-31

申请人： David Allen Brown ,  Robert Corley ,  Asif Khan

发明人： David Allen Brown ,  Robert Corley ,  Asif Khan

IPC分类号： H04L12/56 ,  H04L29/06 ,  H04L12/28

CPC分类号： H04L49/30 ,  H04L43/0888 ,  H04L49/501 ,  H04L49/555 ,  H04L69/22

摘要： A processor includes controller circuitry operative to control performance monitoring for at least one flow of cells or other protocol data units (PDUs) received by the processor. The controller circuitry includes a classifier and is operative to access memory circuitry associated with the processor. The classifier is configured to perform at least a first pass classification of at least a subset of the PDUs. The controller circuitry in conjunction with a first pass classification of a PDU of a first type is operative to execute a first script, and in conjunction with a first pass classification of a PDU of a second type is operative to execute a second script different than the first script. A result of execution of at least one of the first and second scripts is stored in the memory circuitry. A performance monitoring output is generated, responsive to receipt of the protocol data unit of the second type, based at least in part on the result of execution of at least one of the first and second scripts. The performance monitoring output may be generated in conjunction with a second pass classification of the PDU of the second type, upon execution of an additional function or other type of script.

摘要翻译： 处理器包括控制器电路，其可操作以控制由处理器接收的小区或其他协议数据单元（PDU）的至少一个流的性能监视。 控制器电路包括分类器，并且可操作以访问与处理器相关联的存储器电路。 分类器被配置为执行至少PDU的子集的至少第一遍分类。 控制器电路结合第一类型的PDU的第一遍分类可操作以执行第一脚本，并且结合第二类型的PDU的第一遍分类可操作以执行不同于第二脚本的第二脚本 第一个脚本 执行第一和第二脚本中的至少一个脚本的结果被存储在存储器电路中。 至少部分地基于第一和第二脚本中的至少一个的执行结果，响应于第二类型的协议数据单元的接收而生成性能监视输出。 性能监视输出可以在执行附加功能或其他类型的脚本时结合第二类型的PDU的第二遍分类来生成。