公开(公告)号：US09990317B2

公开(公告)日：2018-06-05

申请号：US15346602

申请日：2016-11-08

Applicant: QUALCOMM Incorporated

Inventor： Lalan Jee Mishra ,  Richard Wietfeldt ,  Helena Deirdre O'Shea

IPC: G06F13/36 ,  G06F12/00 ,  G06F13/362 ,  G06F9/30

CPC classification number: G06F13/362 ,  G06F9/30101 ,  G06F13/38

Abstract: Systems, methods, and apparatus for data communication are provided. An apparatus maybe configured to generate a mask field in a packet to be transmitted through an interface to a slave device, the mask field having a first number of bits, provide a control-bit field in the packet, the control-bit field having a second number of bits, where the second number of bits is less than the first number of bits, and transmit the packet through the interface. The packet may be addressed to a control register of the slave device. The control register may have the first number of bits. Each bit in the control-bit field may correspond to a bit of the control register that is identified by the mask field.

公开(公告)号：US20170116141A1

公开(公告)日：2017-04-27

申请号：US15298071

申请日：2016-10-19

Applicant: QUALCOMM Incorporated

Inventor： Lalan Jee Mishra ,  Richard Wietfeldt ,  Helena Deirdre O'Shea ,  Zhenqi Chen ,  Wolfgang Roethig

IPC: G06F13/28 ,  G06F13/10

CPC classification number: G06F13/28 ,  G06F13/102 ,  G06F13/16

Abstract: Methods and apparatuses are described that facilitate the communication of data between a transmitter and a receiver across a serial bus interface. In one configuration, a transmitter generates a datagram based on a 16-bit address and a mask-and-data pair burst length, the 16-bit address including a most significant byte (MSB) and a least significant byte (LSB), compares the MSB to a receiver base address maintained in a shadow register, compares the mask-and-data pair burst length to a receiver masked-write burst length maintained in the shadow register, and sends the datagram to the receiver via the bus interface when: the MSB is equal to the receiver base address maintained in the shadow register, and the mask-and-data pair burst length is equal to the receiver masked-write burst length maintained in the shadow register.

公开(公告)号：US09480017B2

公开(公告)日：2016-10-25

申请号：US13764350

申请日：2013-02-11

Applicant: QUALCOMM Incorporated

Inventor： Hardik M Patel ,  Todd R Sutton ,  Frederic Bossu ,  Chris M Rosolowski ,  Helena Deirdre O'Shea

IPC: H04W52/00 ,  H04W52/02

CPC classification number: H04W52/0225 ,  H04W52/0245 ,  Y02D70/00

Abstract: Exemplary embodiments are related to enhancing power efficiency of an electronic device. A device may include a power management module and a radio-frequency (RF) module coupled to the power management module. The device may further include a digital module coupled to each of the power management module and the RF module and configured to dynamically adjust at least one setting of the power management module based on one or more RF conditions.

Abstract translation: 示例性实施例涉及提高电子设备的功率效率。 设备可以包括耦合到电源管理模块的电源管理模块和射频（RF）模块。 该设备还可以包括耦合到每个电源管理模块和RF模块的数字模块，并且被配置为基于一个或多个RF条件来动态地调整功率管理模块的至少一个设置。

公开(公告)号：US09236884B2

公开(公告)日：2016-01-12

申请号：US13929728

申请日：2013-06-27

Applicant: QUALCOMM Incorporated

Inventor： Hans Georg Gruber ,  Subra Dravida ,  Parvathanathan Subrahmanya ,  Vidyut Mukund Naware ,  Helena Deirdre O'Shea ,  Garret Webster Shih ,  Jason Thurston

IPC: H03M13/09 ,  H03M13/00 ,  H04L1/00

CPC classification number: H03M13/09 ,  H04L1/004 ,  H04L1/0061 ,  H04L1/0072

Abstract: A method, an apparatus, and a computer program product for communication within a wireless terminal. The method can be implemented using dedicated logic and managed and controlled by state machines and/or sequencers. Data received or provided in a memory of a first integrated circuit of a terminal is encoded and transmitted in a data packet to a second integrated circuit. A header identifying the data type and providing a destination is included in the data packet. The destination may be identified as a memory address memory of the second integrated circuit that is mapped to a corresponding memory address of the first integrated circuit at which the data is received. In an aspect, the apparatus receives a header, detects an error in the received header, determines a failure to identify a packet boundary when the error is detected, and performs a search operation to identify the packet boundary.

Abstract translation: 一种用于在无线终端内进行通信的方法，装置和计算机程序产品。 该方法可以使用专用逻辑来实现，并由状态机和/或定序器进行管理和控制。 接收或提供在终端的第一集成电路的存储器中的数据被编码并在数据分组中发送到第二集成电路。 识别数据类型并提供目的地的报头被包括在数据分组中。 目的地可以被识别为第二集成电路的存储器地址存储器，其被映射到接收数据的第一集成电路的相应存储器地址。 一方面，该装置接收报头，检测出接收到的报头中的错误，确定检测到错误时识别分组边界的故障，并执行识别分组边界的搜索操作。