Method and system for sliding-window based phase, gain, frequency and DC offset estimation for servo channel
    22.
    发明授权
    Method and system for sliding-window based phase, gain, frequency and DC offset estimation for servo channel 有权
    用于伺服信道的基于滑窗的相位,增益,频率和直流偏移估计的方法和系统

    公开(公告)号:US08958166B2

    公开(公告)日:2015-02-17

    申请号:US13895809

    申请日:2013-05-16

    CPC classification number: G11B20/16 G11B5/012 G11B5/59688

    Abstract: Sliding-window based data processing includes receiving an analog signal, converting the analog signal to a series of digital samples synchronous to a sampling clock, performing a first discrete Fourier transform on a first portion of the series of digital samples, performing a second discrete Fourier transform on a second portion of the series of digital samples, performing a third discrete Fourier transform on a third portion of the series of digital samples, generating a first series of zero phase start values by calculating a zero phase start value based on the first discrete Fourier transform in a sliding-window at a series of time increments across the servo preamble, storing the zero phase start values, and averaging the stored zero phase start values at the end of the servo preamble.

    Abstract translation: 基于滑动窗口的数据处理包括接收模拟信号,将模拟信号转换为与采样时钟同步的一系列数字采样,在该系列数字样本的第一部分上执行第一离散付里叶变换,执行第二离散付里叶 在所述一系列数字样本的第二部分上进行变换,在所述一系列数字采样的第三部分上执行第三离散付里叶变换,通过基于所述第一离散值计算零相位起始值来产生第一系列的零相位起始值 在伺服前导码中以一系列时间增量在滑动窗口中进行傅里叶变换,存储零相位起始值,并且在伺服前导码结束时平均存储的零相位起始值。

    Method and System for Sliding-Window Based Phase, Gain, Frequency and DC Offset Estimation for Servo Channel
    25.
    发明申请
    Method and System for Sliding-Window Based Phase, Gain, Frequency and DC Offset Estimation for Servo Channel 有权
    用于滑动窗口相位的方法和系统,用于伺服信道的增益,频率和直流偏移估计

    公开(公告)号:US20140340780A1

    公开(公告)日:2014-11-20

    申请号:US13895809

    申请日:2013-05-16

    CPC classification number: G11B20/16 G11B5/012 G11B5/59688

    Abstract: Sliding-window based data processing includes receiving an analog signal, converting the analog signal to a series of digital samples synchronous to a sampling clock, performing a first discrete Fourier transform on a first portion of the series of digital samples, performing a second discrete Fourier transform on a second portion of the series of digital samples, performing a third discrete Fourier transform on a third portion of the series of digital samples, generating a first series of zero phase start values by calculating a zero phase start value based on the first discrete Fourier transform in a sliding-window at a series of time increments across the servo preamble, storing the zero phase start values, and averaging the stored zero phase start values at the end of the servo preamble.

    Abstract translation: 基于滑动窗口的数据处理包括接收模拟信号,将模拟信号转换为与采样时钟同步的一系列数字采样,在该系列数字样本的第一部分上执行第一离散付里叶变换,执行第二离散付里叶 在所述一系列数字样本的第二部分上进行变换,在所述一系列数字采样的第三部分上执行第三离散付里叶变换,通过基于所述第一离散值计算零相位起始值来产生第一系列的零相位起始值 在伺服前导码中以一系列时间增量在滑动窗口中进行傅里叶变换,存储零相位起始值,并且在伺服前导码结束时平均存储的零相位起始值。

    Systems and Methods for Processing Data With Linear Phase Noise Predictive Filter
    26.
    发明申请
    Systems and Methods for Processing Data With Linear Phase Noise Predictive Filter 有权
    用线性相位噪声预测滤波器处理数据的系统和方法

    公开(公告)号:US20140334028A1

    公开(公告)日:2014-11-13

    申请号:US13912171

    申请日:2013-06-06

    Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for data processing with a linear phase noise predictive filter. A data processing system includes an equalizer circuit operable to filter a digital data input to yield equalized data, a linear phase noise predictive finite impulse response filter operable to filter the equalized data to yield filtered data, and a data detector circuit operable to apply a data detection algorithm to the filtered data to yield a detected output. The greatest tap coefficient for the linear phase noise predictive finite impulse response filter is at a center tap.

    Abstract translation: 用于数据处理的系统,方法,设备,电路,更具体地涉及用于使用线性相位噪声预测滤波器进行数据处理的系统和方法。 数据处理系统包括均衡器电路,可操作以对数字数据输入进行滤波以产生均衡的数据;线性相位噪声预测有限脉冲响应滤波器,可操作以对均衡的数据进行滤波以产生滤波后的数据;以及数据检测器电路,可操作以应用数据 检测算法对滤波后的数据产生检测输出。 线性相位噪声预测有限脉冲响应滤波器的最大抽头系数位于中心抽头。

    Systems and methods for burst demodulation
    27.
    发明授权
    Systems and methods for burst demodulation 有权
    突发解调的系统和方法

    公开(公告)号:US08861107B2

    公开(公告)日:2014-10-14

    申请号:US13886049

    申请日:2013-05-02

    CPC classification number: G11B20/18 G11B20/10268

    Abstract: A data processing circuit with flaw robust burst field demodulation includes a burst integration circuit operable to calculate burst integration results for a servo data burst field, a comparison circuit operable to determine whether an absolute value of the burst integration results falls outside a window, and an error indicating circuit operable to indicate that a media flaw has been detected when the absolute value of the burst integration results fall outside the window.

    Abstract translation: 具有缺陷鲁棒脉冲串场解调的数据处理电路包括可用于计算伺服数据脉冲串场的脉冲串积分结果的脉冲串积分电路,可用于确定脉冲串积分结果的绝对值是否落在窗外的比较电路, 错误指示电路可操作以指示当突发集成结果的绝对值落在窗口之外时已经检测到介质缺陷。

    Automatic on-drive sync-mark search and threshold adjustment
    28.
    发明授权
    Automatic on-drive sync-mark search and threshold adjustment 有权
    自动驱动器同步标记搜索和阈值调整

    公开(公告)号:US08837263B1

    公开(公告)日:2014-09-16

    申请号:US13850942

    申请日:2013-03-26

    CPC classification number: G11B27/3027 G11B20/10 G11B20/1403 G11B27/10

    Abstract: A hard disk drive includes a processor to automatically adjust a threshold level for finding sync-marks. The processor determines all possible sync-mark patterns for a particular pattern length and analyzes each pattern with reference to real world data. The pattern with the largest distance gap is used. The threshold level is then adjusted dynamically to produce the lowest possible failure rate for the given pattern.

    Abstract translation: 硬盘驱动器包括一个处理器,用于自动调整阈值水平以查找同步标记。 处理器确定特定图案长度的所有可能的同步标记图案,并参考真实世界数据分析每个图案。 使用距离最大的图案。 然后动态调整阈值电平,以产生给定模式的最低可能故障率。

    Systems and Methods For Burst Demodulation
    29.
    发明申请
    Systems and Methods For Burst Demodulation 有权
    爆破解调系统和方法

    公开(公告)号:US20140233128A1

    公开(公告)日:2014-08-21

    申请号:US13886049

    申请日:2013-05-02

    CPC classification number: G11B20/18 G11B20/10268

    Abstract: A data processing circuit with flaw robust burst field demodulation includes a burst integration circuit operable to calculate burst integration results for a servo data burst field, a comparison circuit operable to determine whether an absolute value of the burst integration results falls outside a window, and an error indicating circuit operable to indicate that a media flaw has been detected when the absolute value of the burst integration results fall outside the window.

    Abstract translation: 具有缺陷鲁棒脉冲串场解调的数据处理电路包括可用于计算伺服数据脉冲串场的脉冲串积分结果的脉冲串积分电路,可用于确定脉冲串积分结果的绝对值是否落在窗外的比较电路, 错误指示电路可操作以指示当突发集成结果的绝对值落在窗口之外时已经检测到介质缺陷。

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