公开(公告)号：US10748824B2

公开(公告)日：2020-08-18

申请号：US16701606

申请日：2019-12-03

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Javier A. Delacruz ,  Paul M. Enquist ,  Gaius Gillman Fountain, Jr. ,  Ilyas Mohammed

IPC: H01L21/66 ,  H01L23/00

Abstract: Representative implementations of devices and techniques provide a temporary access point (e.g., for testing, programming, etc.) for a targeted interconnect located among multiple finely spaced interconnects on a surface of a microelectronic component. One or more sacrificial layers are disposed on the surface of the microelectronic component, overlaying the multiple interconnects. An insulating layer is disposed between a conductive layer and the surface, and includes a conductive via through the insulating layer that electrically couples the conductive layer to the target interconnect. The sacrificial layers are configured to be removed after the target interconnect has been accessed, without damaging the surface of the microelectronic component.

公开(公告)号：US10658313B2

公开(公告)日：2020-05-19

申请号：US16189804

申请日：2018-11-13

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Javier A. Delacruz ,  Rajesh Katkar ,  Shaowu Huang ,  Gaius Gillman Fountain, Jr. ,  Liang Wang ,  Laura Wills Mirkarimi

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L25/00

Abstract: Representative implementations of techniques and devices are used to remedy or mitigate the effects of damaged interconnect pads of bonded substrates. A recess of predetermined size and shape is formed in the surface of a second substrate of the bonded substrates, at a location that is aligned with the damaged interconnect pad on the first substrate. The recess encloses the damage or surface variance of the pad, when the first and second substrates are bonded.

公开(公告)号：US10607937B2

公开(公告)日：2020-03-31

申请号：US16388692

申请日：2019-04-18

Applicant: INVENSAS BONDING TECHNOLOGIES, INC.

Inventor： Paul M. Enquist ,  Gaius Gillman Fountain, Jr. ,  Javier A. DeLaCruz

IPC: H01L23/528 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/768 ,  H01L23/522

Abstract: A bonded device structure including a first substrate having a first set of conductive contact structures, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the contact structures on the first substrate, a second substrate having a second set of conductive contact structures, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the contact structures on the second substrate, and a contact-bonded interface between the first and second set of contact structures formed by contact bonding of the first non-metallic region to the second non-metallic region. The contact structures include elongated contact features, such as individual lines or lines connected in a grid, that are non-parallel on the two substrates, making contact at intersections. Alignment tolerances are thus improved while minimizing dishing and parasitic capacitance.

公开(公告)号：US10147641B2

公开(公告)日：2018-12-04

申请号：US15653329

申请日：2017-07-18

Applicant: INVENSAS BONDING TECHNOLOGIES, INC.

Inventor： Paul M. Enquist ,  Gaius Gillman Fountain, Jr. ,  Qin-Yi Tong

IPC: H01L23/00 ,  H01L21/768 ,  H01L27/06 ,  H01L23/48 ,  H01L25/065 ,  H01L25/00

Abstract: A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated dies or wafers. Either or both of the die and wafer may have semiconductor devices formed therein. A first element having a first contact structure is bonded to a second element having a second contact structure. First and second contact structures can be exposed at bonding and electrically interconnected as a result of the bonding. A via may be etched and filled after bonding to expose and form an electrical interconnect to interconnected first and second contact structures and provide electrical access to this interconnect from a surface.

公开(公告)号：US09852988B2

公开(公告)日：2017-12-26

申请号：US15379942

申请日：2016-12-15

Applicant: INVENSAS BONDING TECHNOLOGIES, INC.

Inventor： Paul M. Enquist ,  Gaius Gillman Fountain, Jr. ,  Javier A. DeLaCruz

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L25/065

CPC classification number: H01L23/5283 ,  H01L21/76838 ,  H01L23/5226 ,  H01L24/02 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/80 ,  H01L2225/06513 ,  H01L2225/06555 ,  H01L2225/06593

Abstract: A bonded device structure including a first substrate having a first set of conductive contact structures, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the contact structures on the first substrate, a second substrate having a second set of conductive contact structures, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the contact structures on the second substrate, and a contact-bonded interface between the first and second set of contact structures formed by contact bonding of the first non-metallic region to the second non-metallic region. The contact structures include elongated contact features, such as individual lines or lines connected in a grid, that are non-parallel on the two substrates, making contact at intersections. Alignment tolerances are thus improved while minimizing dishing and parasitic capacitance.