FREQUENCY TUNABLE QUBIT CONTROL STRATEGY

    公开(公告)号:US20230032766A1

    公开(公告)日:2023-02-02

    申请号:US16870372

    申请日:2020-05-08

    Applicant: Google LLC

    Abstract: Methods, systems and apparatus for implementing a target two-qubit quantum logic gate on a first qubit and second qubit using a tunable qubit coupler. In one aspect, a method includes generating a control signal for the target two-qubit quantum logic gate according to a control model, wherein the control model comprises a controlled-Z operator and a swap operator that are non-orthogonal; and applying the control signal to the first qubit, second qubit and tunable qubit coupler.

    HYBRID KINETIC INDUCTANCE DEVICES FOR SUPERCONDUCTING QUANTUM COMPUTING

    公开(公告)号:US20220384930A1

    公开(公告)日:2022-12-01

    申请号:US17878877

    申请日:2022-08-01

    Applicant: Google LLC

    Abstract: A device includes: a substrate; a first superconductor layer on the substrate, the first superconductor layer having a first kinetic inductance; and a second superconductor layer on the first superconductor layer, the second superconductor layer having a second kinetic inductance that is lower than the first kinetic inductance, in which the second superconductor layer covers the first superconductor layer such that the second superconductor layer and the first superconductor layer have a same footprint, with the exception of at least a first region where the second superconductor layer is omitted so that the first superconductor layer and the second superconductor layer form a circuit element having a predetermined circuit parameter.

    REDUCING PARASITIC CAPACITANCE AND COUPLING TO INDUCTIVE COUPLER MODES

    公开(公告)号:US20210384402A1

    公开(公告)日:2021-12-09

    申请号:US17405448

    申请日:2021-08-18

    Applicant: Google LLC

    Abstract: A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.

    Reducing parasitic capacitance and coupling to inductive coupler modes

    公开(公告)号:US11127892B2

    公开(公告)日:2021-09-21

    申请号:US16473779

    申请日:2017-12-15

    Applicant: Google LLC

    Abstract: A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.

    Tunable qubit coupler
    27.
    发明授权

    公开(公告)号:US12127484B2

    公开(公告)日:2024-10-22

    申请号:US17971292

    申请日:2022-10-21

    Applicant: Google LLC

    CPC classification number: H10N60/805 G06N10/00 H10N60/12

    Abstract: Methods, systems and apparatus for implementing a tunable qubit coupler. In one aspect, a device includes: a first data qubit, a second data qubit, and a third qubit that is a tunable qubit coupler arranged to couple to the first data qubit and to couple to the second data qubit such that, during operation of the device, the tunable qubit coupler allows tunable coupling between the first data qubit and the second data qubit.

    JOSEPHSON JUNCTIONS WITH REDUCED STRAY INDUCTANCE

    公开(公告)号:US20230225223A1

    公开(公告)日:2023-07-13

    申请号:US18117918

    申请日:2023-03-06

    Applicant: Google LLC

    CPC classification number: H10N60/0912 G06N10/00 H10N60/12 H10N60/805

    Abstract: Methods, systems and apparatus for forming Josephson junctions with reduced stray inductance. In one aspect, a device includes a substrate; a first superconductor layer on the substrate; an insulator layer on the first superconductor layer; a second superconductor layer on the insulator layer, wherein the first superconductor layer, the insulator layer, and the second superconductor layer form a superconductor tunnel junction; and a third superconductor layer directly on a surface of the first superconductor layer and directly on a surface of the second superconductor layer to provide a first contact to the superconducting tunnel junction and a second contact to the superconductor tunnel junction, respectively.

    Hybrid kinetic inductance devices for superconducting quantum computing

    公开(公告)号:US11450938B2

    公开(公告)日:2022-09-20

    申请号:US16462263

    申请日:2017-09-13

    Applicant: Google LLC

    Abstract: A device includes: a substrate; a first superconductor layer on the substrate, the first superconductor layer having a first kinetic inductance; and a second superconductor layer on the first superconductor layer, the second superconductor layer having a second kinetic inductance that is lower than the first kinetic inductance, in which the second superconductor layer covers the first superconductor layer such that the second superconductor layer and the first superconductor layer have a same footprint, with the exception of at least a first region where the second superconductor layer is omitted so that the first superconductor layer and the second superconductor layer form a circuit element having a predetermined circuit parameter.

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