Methods and apparatus for designing and constructing dual write memory circuits with voltage assist
    21.
    发明授权
    Methods and apparatus for designing and constructing dual write memory circuits with voltage assist 有权
    用于设计和构建具有电压辅助功能的双写存储器电路的方法和装置

    公开(公告)号:US09520178B2

    公开(公告)日:2016-12-13

    申请号:US14831008

    申请日:2015-08-20

    CPC classification number: G11C11/419 G11C8/16 G11C11/412 G11C11/413

    Abstract: Static random access memory (SRAM) circuits are used in most digital integrated circuits to store representations of data bits. To handle multiple concurrent memory requests, an efficient dual-port six transistor (6T) SRAM bit cell is proposed. The dual-port 6T SRAM cell uses independent word lines and bit lines such that the true/data side and the false/data-complement side of the SRAM bit cell may be accessed independently. Single-ended reads allow the two independent word lines and bit lines to handle two independent read operations in a single cycle using spatial domain multiplexing. Single-ended writes are enabled by adjusting the VDD power voltage supplied to a memory cell when writes are performed such that a single word line and bit line pair can be used write either a logical “0” or logical “1” into either side of the SRAM bit cell.

    Abstract translation: 在大多数数字集成电路中使用静态随机存取存储器(SRAM)电路来存储数据位的表示。 为了处理多个并发存储器请求,提出了一种高效的双端口六晶体管(6T)SRAM位单元。 双端口6T SRAM单元使用独立的字线和位线,使得可以独立地访问SRAM位单元的真/数据侧和伪/数据补码侧。 单端读取允许两个独立的字线和位线使用空间域复用在单个周期中处理两个独立的读操作。 通过调整在执行写入时提供给存储单元的VDD电源电压,使得可以使用单个字线和位线对将逻辑“0”或逻辑“1”写入到 SRAM位单元。

    Methods and apparatus for designing and constructing dual write memory circuits with voltage assist
    22.
    发明授权
    Methods and apparatus for designing and constructing dual write memory circuits with voltage assist 有权
    用于设计和构建具有电压辅助功能的双写存储器电路的方法和装置

    公开(公告)号:US09147466B2

    公开(公告)日:2015-09-29

    申请号:US14274518

    申请日:2014-05-09

    CPC classification number: G11C11/419 G11C8/16 G11C11/412 G11C11/413

    Abstract: Static random access memory (SRAM) circuits are used in most digital integrated circuits to store representations of data bits. To handle multiple concurrent memory requests, an efficient dual-port six transistor (6T) SRAM bit cell is proposed. The dual-port 6T SRAM cell uses independent word lines and bit lines such that the true/data side and the false/data-complement side of the SRAM bit cell may be accessed independently. Single-ended reads allow the two independent word lines and bit lines to handle two independent read operations in a single cycle using spatial domain multiplexing. Single-ended writes are enabled by adjusting the VDD power voltage supplied to a memory cell when writes are performed such that a single word line and bit line pair can be used write either a logical “0” or logical “1” into either side of the SRAM bit cell. Thus, spatial domain multiplexing with a voltage assist allows single-ended writes to handle two independent write operations to be handled in a single cycle. A write buffer may be added to the memory system to prevent conflicts and thus enable concurrent read operations and write operations in a single cycle.

    Abstract translation: 在大多数数字集成电路中使用静态随机存取存储器(SRAM)电路来存储数据位的表示。 为了处理多个并发存储器请求,提出了一种高效的双端口六晶体管(6T)SRAM位单元。 双端口6T SRAM单元使用独立的字线和位线,使得可以独立地访问SRAM位单元的真/数据侧和伪/数据补码侧。 单端读取允许两个独立的字线和位线使用空间域复用在单个周期中处理两个独立的读操作。 通过调整在执行写入时提供给存储单元的VDD电源电压,使得可以使用单个字线和位线对将逻辑“0”或逻辑“1”写入到 SRAM位单元。 因此,具有电压辅助的空间域复用允许单端写入来处理在单个周期中处理的两个独立的写操作。 可以将写缓冲器添加到存储器系统以防止冲突,从而在单个周期中实现并行读取操作和写入操作。

    Topology explorer
    23.
    发明授权

    公开(公告)号:US11463316B2

    公开(公告)日:2022-10-04

    申请号:US16698387

    申请日:2019-11-27

    Abstract: Systems, methods, and computer-readable media for discovering a network's topology and health. In some examples, a system can obtain, from at least one of a plurality of controllers on a network, a logical model of the network, the logical model including configurations of one or more objects defined for the network. Based on the logical model, the system can identify a respective location of the plurality of controllers in the network and a plurality of nodes in a fabric of the network. Based on the respective location of the plurality of controllers and plurality of nodes, the system can poll the plurality of controllers and plurality of nodes for respective status information, and determine a health and topology of the network based on the logical model, the respective location, and respective status information.

    Shim layer for extracting and prioritizing underlying rules for modeling network intents

    公开(公告)号:US10904101B2

    公开(公告)日:2021-01-26

    申请号:US15693280

    申请日:2017-08-31

    Abstract: Systems, methods, and computer-readable media for receiving one or more models of network intents, comprising a plurality of contracts between providers and consumers, each contract containing entries with priority values. Each contract is flattened into a listing of rules and a new priority value is calculated. The listing of rules encodes the implementation of the contract between the providers and the consumers. Each entry is iterated over and added to a listing of entries if it is not already present. For each rule, the one or more entries associated with the contract from which the rule was flattened are identified, and for each given entry a flat rule comprising the combination of the rule and the entry is generated, wherein a flattened priority is calculated based at least in part on the priority value of the given one of given entry and the priority value of the rule.

    Assurance of quality-of-service configurations in a network

    公开(公告)号:US10826788B2

    公开(公告)日:2020-11-03

    申请号:US15693299

    申请日:2017-08-31

    Abstract: Systems, methods, and computer-readable media for assurance of quality-of-service configurations in a network. In some examples, a system obtains a logical model of a software-defined network, the logical model including rules specified for the software-defined network, the logical model being based on a schema defining manageable objects and object properties for the software-defined network. The system also obtains, for each node in the software-defined network, a respective hardware model, the respective hardware model including rules rendered at the node based on a respective node-specific representation of the logical model. Based on the logical model and the respective hardware model, the system can perform an equivalency check between the rules in the logical model and the rules in the respective hardware model to determine whether the logical model and the respective hardware model contain configuration inconsistencies.

    Static network policy analysis for networks

    公开(公告)号:US10560328B2

    公开(公告)日:2020-02-11

    申请号:US15663598

    申请日:2017-07-28

    Abstract: Systems, methods, and computer-readable media for static network policy analysis for a network. In one example, a system obtains a logical model based on configuration data stored in a controller on a software-defined network, the logical model including a declarative representation of respective configurations of objects in the software-defined network, the objects including one or more endpoint groups, bridge domains, contexts, or tenants. The system defines rules representing respective conditions of the objects according to a specification corresponding to the software-defined network, and determines whether the respective configuration of each of the objects in the logical model violates one or more of the rules associated with that object. When the respective configuration of an object in the logical model violates one or more of the rules, the system detects an error in the respective configuration associated with that object.

    SHIM LAYER FOR EXTRACTING AND PRIORITIZING UNDERLYING RULES FOR MODELING NETWORK INTENTS

    公开(公告)号:US20180367417A1

    公开(公告)日:2018-12-20

    申请号:US15693280

    申请日:2017-08-31

    Abstract: Systems, methods, and computer-readable media for receiving one or more models of network intents, comprising a plurality of contracts between providers and consumers, each contract containing entries with priority values. Each contract is flattened into a listing of rules and a new priority value is calculated. The listing of rules encodes the implementation of the contract between the providers and the consumers. Each entry is iterated over and added to a listing of entries if it is not already present. For each rule, the one or more entries associated with the contract from which the rule was flattened are identified, and for each given entry a flat rule comprising the combination of the rule and the entry is generated, wherein a flattened priority is calculated based at least in part on the priority value of the given one of given entry and the priority value of the rule.

    AUTOMATICALLY DETERMINING AN OPTIMAL AMOUNT OF TIME FOR ANALYZING A DISTRIBUTED NETWORK ENVIRONMENT

    公开(公告)号:US20180367411A1

    公开(公告)日:2018-12-20

    申请号:US15792680

    申请日:2017-10-24

    Abstract: Aspects of the technology provide solutions for determining a time period (“epoch”) required to monitor or analyze a tenant network. Some implementations of the technology include a process for making automatic epoch determinations, which includes steps for identifying one or more network parameters for a tenant network, analyzing the tenant network using the network parameters to discover one or more configuration settings of the tenant network, and determining a first epoch for the tenant network, the first epoch corresponding with a period of time to complete analysis of the tenant network using the network parameters. In some aspects, the process can further include steps for generating a tenant profile for the tenant network, the tenant profile based on the network parameters, the first epoch, and the one or more configuration settings of the tenant network. Systems and machine-readable media are also provided.

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