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公开(公告)号:US20250133652A1
公开(公告)日:2025-04-24
申请号:US18532182
申请日:2023-12-07
Applicant: Cisco Technology, Inc.
Inventor: Yuqing Zhu , Wenbin Ma , Mike Sapozhnikov , Weiying Ding , Mingjian Gao , Mingtong Zuo , David Nozadze , Joel Richard Goergen
IPC: H05K1/02 , H01L21/48 , H01L23/498 , H05K3/40
Abstract: In some embodiments, an apparatus includes a layer of a printed circuit board (PCB), a pair of signal vias formed on the layer of the PCB and including a first signal via a second signal via each configured to propagate a respective signal, a first plurality of ground vias formed on the layer and at least partially circumferentially surrounding the first signal via of the pair of signal vias, and a second plurality of ground vias formed on the layer and at least partially circumferentially surrounding the second signal via of the pair of signal vias. The first plurality of ground vias and the second plurality of ground vias include a shared ground via.
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公开(公告)号:US20240355737A1
公开(公告)日:2024-10-24
申请号:US18304001
申请日:2023-04-20
Applicant: Cisco Technology, Inc.
Inventor: Wenbin Ma , Mike Sapozhnikov , Weiying Ding , David Nozadze , Yinxin Yang
IPC: H01L23/528 , H01L21/768 , H01L23/48
CPC classification number: H01L23/5286 , H01L21/76898 , H01L23/481
Abstract: In some aspects, the techniques described herein relate to an apparatus including: a semiconductor device substrate material; a first signal conductor incorporated into the semiconductor device substrate material; a second signal conductor incorporated into the semiconductor device substrate material; and a ground conductor incorporated into the semiconductor device substrate material between the first signal conductor and the second signal conductor, wherein the ground conductor includes a first elongated portion and a second elongated portion arranged at an angle relative to the first elongated portion.
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23.
公开(公告)号:US20240345180A1
公开(公告)日:2024-10-17
申请号:US18422854
申请日:2024-01-25
Applicant: Cisco Technology, Inc.
Inventor: David Nozadze , Mike Sapozhnikov , Upen Reddy Kareti , Amendra Koul , Joel Richard Goergen
Abstract: Presented herein is a method comprising: determining skew values of cables, each skew value indicating a time of signal propagation along a respective cable at a respective signal frequency value, and the skew values being frequency dependent and varying at signal frequency values; determining skew behavior property values for each cable based on the skew values; determining a performance metric value for each skew behavior property value; determining a relationship between the skew values and the signal frequency values at each performance metric value based on the performance metric value for each skew behavior property value; and coupling a first electronic component and a second electronic component to one another using a new cable based on the relationship between the skew values and the signal frequency values at each performance metric value.
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公开(公告)号:US20230397343A1
公开(公告)日:2023-12-07
申请号:US17942711
申请日:2022-09-12
Applicant: Cisco Technology, Inc.
Inventor: Mike Sapozhnikov , Sayed Ashraf Mamun , D. Brice Achkir , David Nozadze , Amendra Koul , Upen Reddy Kareti
CPC classification number: H05K3/4697 , H05K3/0047
Abstract: The techniques described herein relate to an apparatus including: a support structure of an integrated circuit device; and an elongated cavity formed in the support structure of the integrated circuit device, wherein an interior of the elongated cavity is plated with a conductive material separated into a first power connection portion and a first ground connection portion.
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25.
公开(公告)号:US20230269873A1
公开(公告)日:2023-08-24
申请号:US18305489
申请日:2023-04-24
Applicant: Cisco Technology, Inc.
Inventor: Joel Goergen , Jessica Kiefer , Alpesh Umakant Bhobe , Kameron Rose Hurst , D. Brice Achkir , Amendra Koul , Scott Hinaga , David Nozadze
CPC classification number: H05K1/09 , H05K3/4644 , H05K2203/1545 , H05K2201/0323 , H05K2201/0338
Abstract: A structure includes a first copper layer and a first carbon layer applied directly to a surface of the first copper layer, a second copper layer and a second carbon layer applied directly to a surface of the second copper layer, and an insulating core disposed between the first and second copper layers. Each of the first carbon layer and the second carbon layer faces toward and directly contacts the insulating core. The structure provides electrical power to a component of an electronic device.
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公开(公告)号:US11425821B2
公开(公告)日:2022-08-23
申请号:US16547639
申请日:2019-08-22
Applicant: Cisco Technology, Inc.
Inventor: Amendra Koul , Mike Sapozhnikov , David Nozadze , Joel Goergen
IPC: H05K3/00 , H05K1/18 , H05K1/02 , G06F30/367 , G06F30/392 , G01R31/28
Abstract: A printed circuit board (PCB) includes a plurality of layers disposed at different depths of the PCB, circuit components disposed at different layers of the PCB, and a plurality of temperature measurement sensors located at one or more layers of the PCB, where each temperature measurement sensor is associated with a corresponding circuit component. A measured temperature is obtained at an embedded temperature measurement sensor located at an embedded layer within the PCB, and the measured temperature is correlated with an electrical property of an embedded circuit component located at the same embedded layer within the PCB as the embedded temperature measurement sensor. A plurality of moisture measurement sensors can also be located at one or more layers of the PCB to facilitate a measured moisture with an electrical property of an embedded circuit component.
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公开(公告)号:US20220217837A1
公开(公告)日:2022-07-07
申请号:US17703051
申请日:2022-03-24
Applicant: Cisco Technology, Inc.
Inventor: Joel Goergen , Scott Hinaga , Jessica Kiefer , Alpesh Umakant Bhobe , D. Brice Achkir , David Nozadze , Amendra Koul , Mehmet Onder Cap , Madeline Marie Roemer
IPC: H05K1/02
Abstract: A conductive signal transmission structure for an electronic device (e.g., a printed circuit board of an electronic device) includes a copper material and a graphene layer disposed within the copper material at a depth below a surface of the structure. The depth of the graphene layer is further within a skin depth region of the structure when a transmission signal applied to the conductive signal transmission structure has a signal speed of at least 112 Gbps.
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28.
公开(公告)号:US20220039257A1
公开(公告)日:2022-02-03
申请号:US17503690
申请日:2021-10-18
Applicant: Cisco Technology, Inc.
Inventor: Joel Goergen , Jessica Kiefer , Alpesh Umakant Bhobe , Kameron Rose Hurst , D. Brice Achkir , Amendra Koul , Scott Hinaga , David Nozadze
Abstract: A structure includes a first copper layer and a first carbon layer applied directly to a surface of the first copper layer, a second copper layer and a second carbon layer applied directly to a surface of the second copper layer, and an insulating core disposed between the first and second copper layers. Each of the first carbon layer and the second carbon layer faces toward and directly contacts the insulating core. The structure provides electrical power to a component of an electronic device.
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29.
公开(公告)号:US11202368B2
公开(公告)日:2021-12-14
申请号:US17006016
申请日:2020-08-28
Applicant: Cisco Technology, Inc.
Inventor: Joel Goergen , Jessica Kiefer , Alpesh Umakant Bhobe , Kameron Rose Hurst , D. Brice Achkir , Amendra Koul , Scott Hinaga , David Nozadze
Abstract: A power plane structure for a printed circuit board includes a copper layer, and a carbon layer applied directly to a surface of the copper layer. The carbon layer can include graphite or graphene. In additional embodiments, a duplicate power plane structure for a printed circuit board includes two power planes separated by an insulating core, each power plane including a copper layer and a carbon layer applied directly to a surface of the copper layer.
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公开(公告)号:US20210059055A1
公开(公告)日:2021-02-25
申请号:US16547639
申请日:2019-08-22
Applicant: Cisco Technology, Inc.
Inventor: Amendra Koul , Mike Sapozhnikov , David Nozadze , Joel Goergen
Abstract: A printed circuit board (PCB) includes a plurality of layers disposed at different depths of the PCB, circuit components disposed at different layers of the PCB, and a plurality of temperature measurement sensors located at one or more layers of the PCB, where each temperature measurement sensor is associated with a corresponding circuit component. A measured temperature is obtained at an embedded temperature measurement sensor located at an embedded layer within the PCB, and the measured temperature is correlated with an electrical property of an embedded circuit component located at the same embedded layer within the PCB as the embedded temperature measurement sensor. A plurality of moisture measurement sensors can also be located at one or more layers of the PCB to facilitate a measured moisture with an electrical property of an embedded circuit component.
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