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21.
公开(公告)号:US20220246812A1
公开(公告)日:2022-08-04
申请号:US17522282
申请日:2021-11-09
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiao ZHAO , Haoliang ZHENG , Li XIAO , Dongni LIU , Liang CHEN , Hao CHEN , Minghua XUAN
Abstract: The present disclosure discloses a light-emitting substrate, a method for forming the light-emitting substrate and a display device. The light-emitting substrate includes: a base substrate; a first signal line located at one side of the base substrate; an insulation layer located at one side of the first signal line away from the base substrate; an electrode layer located at one side of the insulation layer away from the base substrate and including a first electrode terminal, a second electrode terminal and a second signal line, where the first electrode terminal is electrically connected to the first signal line via a first through hole penetrating the insulation layer; and at least one light-emitting element bound and connected to the first electrode terminal and the second electrode terminal.
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公开(公告)号:US20220101779A1
公开(公告)日:2022-03-31
申请号:US17408967
申请日:2021-08-23
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Dongni LIU , Minghua XUAN , Haoliang ZHENG , Li XIAO , Seungwoo HAN , Liang CHEN , Hao CHEN , Jiao ZHAO
IPC: G09G3/32
Abstract: A light-emitting driving circuit includes a driving sub-circuit, a control sub-circuit, a data writing sub-circuit and a compensation sub-circuit. The control sub-circuit is configured to initialize voltages of a first node and a control terminal of the driving sub-circuit in response to a second scan signal. The data writing sub-circuit is configured to write a data signal into a first terminal of the driving sub-circuit in response to a first scan signal. The driving sub-circuit is configured to output, from a second terminal of the driving sub-circuit, the data signal and a compensation signal. The compensation sub-circuit is configured to transmit the data signal and the compensation signal to the first node in response to the first scan signal, and adjust the voltage of the control terminal according to the data signal, the compensation signal, the initialized voltages of the first node and the control terminal.
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公开(公告)号:US20220093024A1
公开(公告)日:2022-03-24
申请号:US17327056
申请日:2021-05-21
Applicant: BOE Technology Group Co., Ltd.
Inventor: Haoliang ZHENG , Seungwoo HAN , Yi OUYANG , Minghua XUAN
Abstract: The present disclosure provides a shift register unit and a driving method thereof, a gate driving circuit and a driving method thereof, and a display device. The shift register unit includes: a first shift register, a second shift register and a switch control circuit, signal input terminals of the first and second shift registers are coupled to a cascade signal input terminal through the switch control circuit, the switch control circuit is configured to allow a current between the signal input terminal of the first shift register and the cascade signal input terminal or not, and allow a current between the signal input terminal of the second shift register and the cascade signal input terminal or not; the first shift register and the second shift register are configured such that at least one of them operates upon receiving a cascade signal provided by the cascade signal input terminal.
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公开(公告)号:US20220005414A1
公开(公告)日:2022-01-06
申请号:US17294231
申请日:2020-09-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Dongni LIU , Minghua XUAN , Xiaochuan CHEN , Xue DONG , Haoliang ZHENG , Han YUE , Ning CONG
IPC: G09G3/3258 , G09G3/3266 , G09G3/3291
Abstract: A pixel driving circuit includes a data writing sub-circuit, a driving sub-circuit, and a control sub-circuit. The data writing sub-circuit is configured to: in response to a first scanning signal and a third scanning signal, write a first data signal into the driving sub-circuit; and in response to a second scanning signal and the third scanning signal, write a second data signal into the driving sub-circuit. The control sub-circuit is configured to, in response to an enable signal, connect a driving transistor to a first power supply voltage signal terminal and an element to be driven. The driving sub-circuit is configured to: according to the first data signal and a first power supply voltage signal, output a driving signal; and according to the second data signal and the first power supply voltage signal, control an operating state of the element to be driven.
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公开(公告)号:US20210375702A1
公开(公告)日:2021-12-02
申请号:US17253960
申请日:2019-11-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Li XIAO , Dongni LIU , Minghua XUAN , Jiao ZHAO , Haoliang ZHENG , Zhenyu ZHANG , Liang CHEN , Hao CHEN , Jing LIU , Qi QI
Abstract: The present application provides a method for detecting a broken fanout wire of a display substrate, and a display substrate, and belongs to the field of display technology. In the method for detecting a broken fanout wire, the display substrate includes a base substrate having first and second surfaces opposite to each other, and a plurality of connection structures disposed at intervals on the first surface; and each connection structure includes first and second pads and a fanout wire electrically connecting the first pad to the second pad. The method for detecting a broken fanout wire includes: forming at least one detection unit, which includes: connecting at least two connection structures in series through a connecting part; and measuring a head and an end of the detection unit to obtain resistance of the detection unit, and determining whether there is a broken fanout wire in the detection unit.
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26.
公开(公告)号:US20200219576A1
公开(公告)日:2020-07-09
申请号:US16697889
申请日:2019-11-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xing YAO , Mingfu HAN , Guangliang SHANG , Haoliang ZHENG , Lijun YUAN , Zhenyu ZHANG
Abstract: A shift register unit and a method for driving the same, a gate drive circuitry and a display device are provided. The shift register unit includes: an output circuit, coupled to a first signal output terminal and a pull-up control node, and configured to receive a first clock signal and output the first clock signal to the first signal output terminal under control of a potential of the pull-up control node; an output control circuit, coupled to a signal input terminal, the pull-up control node and the first signal output terminal; a clock control circuit configured to receive a first clock signal and at least one additional clock signal and generate a second clock signal using the first clock signal and the at least one additional clock signal; and a transmission circuit coupled to a second signal output terminal and the pull-up control node.
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公开(公告)号:US20200082757A1
公开(公告)日:2020-03-12
申请号:US16399612
申请日:2019-04-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lijun YUAN , Guangliang SHANG , Xing YAO , Haoliang ZHENG , Mingfu HAN
IPC: G09G3/3258 , G09G3/3233 , G09G3/3291 , G09G3/3266 , H01L27/32
Abstract: The present disclosure provides a pixel driving circuit and a method for driving the same, a pixel unit, and a display panel. The pixel circuit includes: a driving sub-circuit, configured to generate driving current based on a data signal and a first voltage; a first light-emitting control sub-circuit configured to receive a first control signal and the first voltage, and provide the first voltage to the driving sub-circuit under control of the first control signal; a second light-emitting control sub-circuit configured to receive a second control signal and provide driving current generated by the driving sub-circuit to an output terminal of the pixel driving circuit under control of the second control signal; a driving control sub-circuit configured to receive the second control signal and the data signal and provide the data signal to the driving sub-circuit under control of the second control signal; and a reset sub-circuit configured to receive a reset signal and a second voltage, and reset the driving sub-circuit using the second voltage under control of the reset signal.
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公开(公告)号:US20190057638A1
公开(公告)日:2019-02-21
申请号:US15768948
申请日:2017-10-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Jiha KIM , Seung Woo HAN , Guangliang SHANG , Xing YAO , Haoliang ZHENG , Mingfu HAN , Zhichong WANG , Lijun YUAN , Yun Sik IM , Jing LV , Yinglong HUANG , Xue DONG
Abstract: A shift-buffer circuit, a gate driving circuit, a display panel, a display device, and a driving method. The shift-buffer circuit includes: a shift register and a plurality of buffers connected with the shift register. The shift register includes a shift output terminal; the shift register is configured to output a shift output signal from the shift output terminal, in response to a shift clock signal; each of the buffers includes a buffer input terminal and a buffer output terminal, the buffer input terminal being connected with the shift output terminal; each of the buffers is configured to output a buffer output signal from the buffer output terminal, in response to a buffer clock signal.
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公开(公告)号:US20180261177A1
公开(公告)日:2018-09-13
申请号:US15796463
申请日:2017-10-27
Applicant: BOE Technology Group Co., Ltd.
Inventor: Mingfu HAN , Xing YAO , Guangliang SHANG , Haoliang ZHENG , Seung-Woo HAN , Jiha KIM , Lijun YUAN , Zhichong WANG
CPC classification number: G09G3/3677 , G06F3/0412 , G06F3/0416 , G09G2310/0286 , G09G2310/0291 , G09G2310/08 , G09G2330/021 , G09G2340/0407 , G11C19/28
Abstract: The present disclosure discloses a gate drive circuit, a display panel and a driving method for the gate drive circuit. The gate drive circuit includes a plurality of shift register units connected in cascade; and further includes: buffer units which are in a one-to-one correspondence with shift register units at all levels, and touch control switch units which are in a one-to-one correspondence with shift register units at even levels. Each buffer unit in the gate drive circuit can increase the holding time of the effective pulse signal output by the shift register unit at a corresponding level by one line before resetting, and the effective pulse signal output by a buffer unit at an even level under the control of a touch control unit and the effective pulse signal output by a buffer unit at an adjacent previous odd level are reset at the same time.
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公开(公告)号:US20180025695A1
公开(公告)日:2018-01-25
申请号:US15656419
申请日:2017-07-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Mingfu HAN , Guangliang SHANG , Seungwoo HAN , Zhihe JIN , Xing YAO , Haoliang ZHENG , Lijun YUAN , Zhichong WANG
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2330/08
Abstract: The present invention discloses a gate driver on array circuit and a driving method thereof, and a display device. The gate driver on array circuit comprises a first gate driver on array sub-circuit and a second gate driver on array sub-circuit; the first gate driver on array sub-circuit is configured to drive in a first working state which is a state in which no defect occurs in the first gate driver on array sub-circuit; the second gate driver on array sub-circuit is configured to drive in a second working state which is a state in which a defect occurs in the first gate driver on array sub-circuit. The present invention improves the yield rate of the gate driver on array circuit.
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