公开(公告)号：US09819587B1

公开(公告)日：2017-11-14

申请号：US14981656

申请日：2015-12-28

Applicant: Amazon Technologies, Inc.

Inventor： Leonard Thomas Tracy ,  Mark Bradley Davis ,  Thomas A. Volpe ,  Kari Ann O'Brien ,  Nafea Bshara

IPC: H04L12/28 ,  H04L12/743 ,  H04L12/723 ,  H04L29/12

CPC classification number: H04L45/7453 ,  H04L45/50 ,  H04L61/6022

Abstract: Indirect destination determinations for forwarding tunnel network packets may be performed. Tunneling may be initiated for network packets received at a packet processor according to a forwarding route or other prior packet processing stage, such as an access control list stage. A corresponding entry in a tunnel lookup table may be accessed to determine the tunneling to be applied to the network packet, such as Internet Protocol tunneling or Multiprotocol Label Switching tunneling. The corresponding entry may also include a pointer to a next hop address table that stores a next hop address for the tunneled version of the network packet. The tunneled version of the network packet may be forwarded to the next hop address.

公开(公告)号：US09733980B1

公开(公告)日：2017-08-15

申请号：US14562560

申请日：2014-12-05

Applicant: Amazon Technologies, Inc.

Inventor： Asif Khan ,  Anthony Nicholas Liguori ,  Mark Bradley Davis

IPC: G06F9/455 ,  G06F9/48 ,  H04L29/06

CPC classification number: G06F5/085 ,  G06F5/14 ,  G06F9/45558 ,  G06F9/4856 ,  G06F13/00 ,  G06F2009/4557 ,  G06F2009/45579 ,  H04J3/14 ,  H04L41/0813 ,  H04L49/90 ,  H04L67/42

Abstract: Techniques are described for managing virtual machines using input/output (I/O) device logging. For example, a system bus or other interface to a device may be monitored for traffic data elements. The traffic data elements may include, for example, transaction layer packets (TLPs) for communication across a PCI Express interface, or TCP/IP packets for communication over a network. These traffic data elements may be logged in an I/O device logging buffer. The I/O device logging buffer can then be used to ensure that all memory relating to a virtual machine is copied when transferring the virtual machine to another computing device. In addition, the I/O device logging buffer can be used to stop a virtual machine without waiting for the virtual machine to complete I/O processing.

公开(公告)号：US20160239445A1

公开(公告)日：2016-08-18

申请号：US14623914

申请日：2015-02-17

Applicant: Amazon Technologies, Inc.

Inventor： Mark Bradley Davis ,  David James Borland

IPC: G06F13/364

CPC classification number: G06F13/364 ,  G06F13/00 ,  G06F13/122 ,  G06F13/128 ,  H04L63/00

Abstract: Embodiments of the technology can provide steering of one or more I/O resources to compute subsystems on a system-on chip (SoC). The SoC may include a first I/O subsystem comprising a plurality of first I/O resources and a second I/O subsystem comprising a plurality of second I/O resources. A steering engine may steer at least one of the first I/O resources to either a network compute subsystem or to a server compute subsystem and may steer at least one of the second I/O resources to either the network compute subsystem or to the server compute subsystem.

Abstract translation: 该技术的实施例可以提供一个或多个I / O资源的转向以在片上系统（SoC）上计算子系统。 SoC可以包括包括多个第一I / O资源的第一I / O子系统和包括多个第二I / O资源的第二I / O子系统。 转向引擎可以将至少一个第一I / O资源引导到网络计算子系统或服务器计算子系统，并且可以将第二I / O资源中的至少一个引导到网络计算子系统或服务器 计算子系统。

公开(公告)号：US12204481B2

公开(公告)日：2025-01-21

申请号：US18383833

申请日：2023-10-25

Applicant: Amazon Technologies, Inc.

Inventor： Islam Atta ,  Christopher Joseph Pettey ,  Asif Khan ,  Robert Michael Johnson ,  Mark Bradley Davis ,  Erez Izenberg ,  Nafea Bshara ,  Kypros Constantinides

IPC: G06F13/40 ,  G06F9/445 ,  G06F13/42 ,  G06F15/78

Abstract: The following description is directed to a configurable logic platform. In one example, a configurable logic platform includes host logic and a reconfigurable logic region. The reconfigurable logic region can include logic blocks that are configurable to implement application logic. The host logic can be used for encapsulating the reconfigurable logic region. The host logic can include a host interface for communicating with a processor. The host logic can include a management function accessible via the host interface. The management function can be adapted to cause the reconfigurable logic region to be configured with the application logic in response to an authorized request from the host interface. The host logic can include a data path function accessible via the host interface. The data path function can include a layer for formatting data transfers between the host interface and the application logic.

公开(公告)号：US20240232117A9

公开(公告)日：2024-07-11

申请号：US18383833

申请日：2023-10-25

Applicant: Amazon Technologies, Inc.

Inventor： Islam Atta ,  Christopher Joseph Pettey ,  Asif Khan ,  Robert Michael Johnson ,  Mark Bradley Davis ,  Erez Izenberg ,  Nafea Bshara ,  Kypros Constantinides

IPC: G06F13/40 ,  G06F9/445 ,  G06F13/42 ,  G06F15/78

CPC classification number: G06F13/4068 ,  G06F9/44505 ,  G06F13/4282 ,  G06F15/7867 ,  G06F15/7871

Abstract: The following description is directed to a configurable logic platform. In one example, a configurable logic platform includes host logic and a reconfigurable logic region. The reconfigurable logic region can include logic blocks that are configurable to implement application logic. The host logic can be used for encapsulating the reconfigurable logic region. The host logic can include a host interface for communicating with a processor. The host logic can include a management function accessible via the host interface. The management function can be adapted to cause the reconfigurable logic region to be configured with the application logic in response to an authorized request from the host interface. The host logic can include a data path function accessible via the host interface. The data path function can include a layer for formatting data transfers between the host interface and the application logic.

公开(公告)号：US11729300B2

公开(公告)日：2023-08-15

申请号：US17163211

申请日：2021-01-29

Applicant: Amazon Technologies, Inc.

Inventor： Thomas A. Volpe ,  Timothy David Gasser ,  Robert Michael Johnson ,  Mark Bradley Davis ,  Vithal Dattatraya Shirodkar

IPC: H04L69/22 ,  H04L45/7453

CPC classification number: H04L69/22 ,  H04L45/7453

Abstract: Programmatically defined fields of metadata for a network packet may be generated. Instructions indicating different portions of data from different headers of a network packet may be stored at a packet processor. When a network packet is received, the different portions of the data may be extracted from the different headers of the packet according to the instructions and provided to other stages of the packet processor for processing. Different portions of the same programmatically defined field may be utilized at different stages in the packet processor. The programmatically defined field may be used to generate a hash value that selects an entry in a lookup table describing a forwarding decision for a network packet.

公开(公告)号：US20230018032A1

公开(公告)日：2023-01-19

申请号：US17952144

申请日：2022-09-23

Applicant: Amazon Technologies, Inc.

Inventor： Islam Atta ,  Christopher Joseph Pettey ,  Asif Khan ,  Robert Michael Johnson ,  Mark Bradley Davis ,  Erez Izenberg ,  Nafea Bshara ,  Kypros Constantinides

IPC: G06F13/40 ,  G06F9/445 ,  G06F13/42 ,  G06F15/78

Abstract: The following description is directed to a configurable logic platform. In one example, a configurable logic platform includes host logic and a reconfigurable logic region. The reconfigurable logic region can include logic blocks that are configurable to implement application logic. The host logic can be used for encapsulating the reconfigurable logic region. The host logic can include a host interface for communicating with a processor. The host logic can include a management function accessible via the host interface. The management function can be adapted to cause the reconfigurable logic region to be configured with the application logic in response to an authorized request from the host interface. The host logic can include a data path function accessible via the host interface. The data path function can include a layer for formatting data transfers between the host interface and the application logic.

公开(公告)号：US20200257454A1

公开(公告)日：2020-08-13

申请号：US16863700

申请日：2020-04-30

Applicant: Amazon Technologies, Inc.

Inventor： Mark Bradley Davis ,  Erez Izenberg ,  Robert Michael Johnson ,  Asif Khan ,  Islam Mohamed Hatem Abdulfattah Mohamed Atta ,  Nafea Bshara ,  Christopher Joseph Pettey

IPC: G06F3/06 ,  G06F15/78 ,  G06F21/51 ,  G06F13/28 ,  G11C7/10

Abstract: Methods and apparatus are disclosed for securely erasing partitions of reconfigurable logic devices such as FPGAs in a multi-tenant server environment. In one example, a method of securely erasing an FPGA includes identifying one partition of previously-programmed resources in the FPGA, erasing the identified partition by storing new values in memory or storage elements of the identified partition, and storing new values in memory or storage elements of additional external resources electrically connected to the integrated circuit and associated with the identified partition. Thus, other partitions and subsequent users of the identified partition are prevented from accessing the securely erased data. A configuration circuit, accessible by a host computer via DMA, can be programmed into the FPGA reconfigurable logic for performing the disclosed erasing operations.

公开(公告)号：US10740466B1

公开(公告)日：2020-08-11

申请号：US15280897

申请日：2016-09-29

Applicant: Amazon Technologies, Inc.

Inventor： Nafea Bshara ,  Matthew Shawn Wilson ,  Eric Jason Brandwine ,  Anthony Nicholas Liguori ,  Yaniv Shapira ,  Mark Bradley Davis ,  Adi Habusha

IPC: G06F15/177 ,  G06F21/57 ,  G06F9/4401 ,  G06F21/72 ,  H04L9/06

Abstract: Interfaces of a compute node on a printed circuit board can be secured by obfuscating the information communicated over the interfaces. Data to be communicated between the compute node and a device on the printed circuit board using an interface can be encrypted, and an address corresponding to the data to be communicated can be scrambled. In addition, the compute node can be the root of trust which can provide secure boot of different components using an on-chip mechanism, and without relying on external devices.

公开(公告)号：US10725957B1

公开(公告)日：2020-07-28

申请号：US16460897

申请日：2019-07-02

Applicant: Amazon Technologies, Inc.

Inventor： Mark Bradley Davis ,  Thomas A. Volpe ,  Nafea Bshara ,  Yaniv Shapira ,  Adi Habusha

IPC: G06F13/42 ,  G06F13/40 ,  G06F13/16

Abstract: A plurality of system on chips (SoCs) in a server computer can be coupled to a plurality of memory agents (MAs) via respective Serializer/Deserializer (SerDes) interfaces. Each of the plurality of MAs can include one or more memory controllers to communicate with a memory coupled to the respective MA, and globally addressable by each of the SoCs. Each of the plurality of SoCs can access the memory coupled to any of the MAs in uniform number of hops using the respective SerDes interfaces. Different types of memories, e.g., volatile memory, persistent memory, can be supported.