公开(公告)号：US06232819B1

公开(公告)日：2001-05-15

申请号：US09504076

申请日：2000-02-15

Applicant: Toshiro Takahashi ,  Kazuo Koide

Inventor： Toshiro Takahashi ,  Kazuo Koide

IPC: H03K501

CPC classification number: H03K3/356121

Abstract: When signal transmission is performed between two semiconductor integrated circuit devices in synchronization with a clock signal using a small signal amplitude relative to an operating voltage of the two semiconductor integrated circuit devices, a received signal is held in the receiving semiconductor integrated circuit device in synchronization with the clock signal while the small signal amplitude of the held signal is kept substantially without change. The received signal having the small signal amplitude is amplified along a signal transmission path including a combined logic circuit to a subsequent latch circuit of the receiving semiconductor integrated circuit device.

Abstract translation: 当使用相对于两个半导体集成电路器件的工作电压的小的信号幅度与时钟信号同步地在两个半导体集成电路器件之间执行信号传输时，接收信号与接收半导体集成电路器件同步地保持在接收半导体集成电路器件中 同时保持信号的小信号幅度基本上保持不变。 具有小信号幅度的接收信号沿着包括组合逻辑电路的信号传输路径被放大到接收半导体集成电路器件的后续锁存电路。

公开(公告)号：US06225832B1

公开(公告)日：2001-05-01

申请号：US09151964

申请日：1998-09-11

Applicant: Michael Moyal

Inventor： Michael Moyal

IPC: H03K501

CPC classification number: H04L25/0266

Abstract: The signal regeneration circuit recovers a digital signal from an input signal that is supplied via metallic isolation (galvanic separation). The circuit has two input terminals for the input signal and one output terminal for the recovered digital signal. A current direction sensor detects the current direction prevailing between the input terminals and outputs the signal in accordance with the last prevailing current direction. The circuit is advantageously used in connection with digital circuits that require potential isolation at their input terminals.

Abstract translation: 信号再生电路从经由金属隔离（电隔离）提供的输入信号中恢复数字信号。 该电路具有两个用于输入信号的输入端和一个用于恢复的数字信号的输出端。 电流方向传感器检测输入端之间的电流方向，并根据最后的当前方向输出信号。 该电路有利地与需要在其输入端子处进行电势隔离的数字电路结​​合使用。

公开(公告)号：US06731149B2

公开(公告)日：2004-05-04

申请号：US10003312

申请日：2001-12-06

Applicant: Katsuaki Isobe ,  Tsuneo Inaba ,  Hironobu Akita

Inventor： Katsuaki Isobe ,  Tsuneo Inaba ,  Hironobu Akita

IPC: H03K501

CPC classification number: H03K5/135 ,  H03K5/133 ,  H03L7/00

Abstract: A first delay line for forward pulses and a second delay line for backward pulses are composed of unit delay elements. A state holding section determines the input position of a backward pulse on the second delay line according to the transfer position of a forward pulse transferred along the first delay line. In the unit delay elements constituting the first and second delay lines, the accuracy of synchronization can be improved by increasing the current driving capability of the transistors related to the rising of the pulse signal.

Abstract translation: 用于正向脉冲的第一延迟线和用于反向脉冲的第二延迟线由单位延迟元件组成。 状态保持部根据沿着第一延迟线传送的正向脉冲的传送位置来确定第二延迟线上的反向脉冲的输入位置。 在构成第一和第二延迟线的单位延迟元件中，可以通过增加与脉冲信号的上升相关的晶体管的电流驱动能力来提高同步精度。

公开(公告)号：US06724840B1

公开(公告)日：2004-04-20

申请号：US09551969

申请日：2000-04-15

Applicant: Samuel S. Osofsky ,  Paul E. Hanson

Inventor： Samuel S. Osofsky ,  Paul E. Hanson

IPC: H03K501

CPC classification number: H04B1/1027 ,  H04B1/123

Abstract: The design and performance of an analog cancellation system is presented. The system generates either narrow or wideband nulls in order to minimize the effect of interfering signals on a receiver. A microcontroller directs the detection and classification of the interfering signal relative to frequency, amplitude and modulation, such as pulse-width or continuous wave modulation. A sampled version of the interfering signal at frequency, fi, is phase-inverted, amplified, and vector-summed with the input signal stream to null the interfering signal at fi. The microcontroller also monitors and adjusts the cancellation systems' circuit parameters to minimize any residual interfering signal at fi or respond to changes in the interference. The example system operates from 100-160 MHz, and can generate wideband nulls over a 5MHz bandwidth with a 15dB depth attenuation or narrowband nulls with a Q greater than 200, and with a null depth greater than 30dB.

Abstract translation: 介绍了模拟取消系统的设计和性能。 系统产生窄带或宽带零点，以便最小化干扰信号对接收机的影响。 微控制器相对于频率，幅度和调制（如脉冲宽度或连续波调制）来引导干扰信号的检测和分类。 频率为f 1的干扰信号的采样版本与输入信号流进行相位反相，放大和矢量求和，以消除fi处的干扰信号。 微控制器还监视和调整取消系统的电路参数，以最小化fi处的任何残留干扰信号或响应干扰的变化。 该示例系统工作在100-160MHz，并且可以在5MHz带宽上生成宽带零点，具有15dB深度衰减或窄带空值，Q大于200，零深度大于30dB。

公开(公告)号：US06671339B1

公开(公告)日：2003-12-30

申请号：US09615716

申请日：2000-07-13

Applicant: Keun Hee Ahn

Inventor： Keun Hee Ahn

IPC: H03K501

CPC classification number: H03L7/095 ,  H04L27/3827 ,  H04L2025/03547 ,  H04L2027/0038

Abstract: A lock detecting apparatus for a multimedia digital broadcasting receiver is disclosed. The present invention is a general purpose lock detecting apparatus applicable to a channel equalizer as well as a carrier recovery unit. Also, the present lock detecting apparatus uses two lock threshold values throughout a pull-in and lock-in, to improve the reliability of the lock detector for a false lock.

Abstract translation: 公开了一种用于多媒体数字广播接收机的锁定检测装置。 本发明是适用于信道均衡器以及载波恢复单元的通用锁定检测装置。 此外，本锁定检测装置在整个拉入和锁定期间使用两个锁定阈值，以提高锁定检测器的假锁的可靠性。

公开(公告)号：US06630851B2

公开(公告)日：2003-10-07

申请号：US10040750

申请日：2001-12-28

Applicant: Robert P Masleid

Inventor： Robert P Masleid

IPC: H03K501

CPC classification number: G06F1/10 ,  H03K5/1506 ,  H03K5/1534

Abstract: A system and method for distributing clock signal information as rising and falling edge signals is disclosed. In one embodiment a first pulse signal includes a pulse generated for the rising edge of each clock pulse signal includes a pulse generated for the falling edge of each clock pulse. The temporal information associated with the time delay of the leading edges of corresponding pulses of the first and second pulse signals may be used to recover the clock signal. In one embodiment, skewed amplifiers are used to amplify the first and second pulse signal edge pulse. In one embodiment, the first and second pulse signals are regenerated and amplified before they are and into a tri-state buffer to recover the clock signal.

公开(公告)号：US06563355B2

公开(公告)日：2003-05-13

申请号：US09897931

申请日：2001-07-05

Applicant: Hiromi Notani

Inventor： Hiromi Notani

IPC: H03K501

CPC classification number: H03L7/0895 ,  H03L7/0995

Abstract: When an up signal UP is inputted, a switch is turned on and thereby a capacitor is charged to raise a control voltage VC. Further, when a down signal DWN is inputted, a switch is turned on and a capacitor discharges to hold the down signal DWN in the capacitor. Then, when a switch is turned on by a transmission signal EXE, an electric charge is injected into the capacitor to lower the control voltage VC. Further, when a switch is turned on by a reset signal RST, the capacitor is charged by an amplifier to cancel the down signal DWN. As a result, a low jitter reproduction clock can be generated regardless of an operating frequency.

公开(公告)号：US06225859B1

公开(公告)日：2001-05-01

申请号：US09152831

申请日：1998-09-14

Applicant: Robert Grant Irvine ,  Bernd Kolb

Inventor： Robert Grant Irvine ,  Bernd Kolb

IPC: H03K501

CPC classification number: H03H11/04

Abstract: The integrated low-pass filter has a resistor connected, on the one hand, to an input terminal and, on the other hand, to a first capacitor and to the control terminal of a transistor. The output circuit of the transistor is connected, on the one hand, to the first capacitor and to an output terminal of the circuit. Furthermore, the output circuit of the transistor is also connected, via a current source and a second capacitor, to a first reference potential. On the other end, the output circuit of the transistor is connected to a second reference potential.

Abstract translation: 集成低通滤波器具有一个电阻器连接到输入端子，另一方面连接到第一电容器和晶体管的控制端子。 一方面，晶体管的输出电路连接到第一电容器和电路的输出端子。 此外，晶体管的输出电路也经由电流源和第二电容器连接到第一参考电位。 另一方面，晶体管的输出电路连接到第二参考电位。

公开(公告)号：US06707331B1

公开(公告)日：2004-03-16

申请号：US10199145

申请日：2002-07-19

Applicant: Andy T. Nguyen

Inventor： Andy T. Nguyen

IPC: H03K501

CPC classification number: H03K5/04 ,  H03K5/133

Abstract: A one-shot circuit provides a pulse on receipt of a first edge, and removes the pulse after a delay generated by a delay chain. However, a second, opposite edge resets the circuit without an intervening delay chain delay. The delay chain can be implemented using a chain of AND circuits (one-shot high) or OR circuits (one-shot low), each driven by the preceding circuit in the chain and by the input signal. In some embodiments, an output circuit includes a pass gate coupled between the one-shot input and output terminals and a pulldown (one-shot high) or pullup (one-shot low) that provides an inactive value when the pulse is not being applied. The pass gate and pullup or pulldown are controlled by the output of the daisy chain. Other embodiments offer programmable capabilities, such as the ability to correct for process shift by altering the effective delay of the delay chain.

Abstract translation: 单触发电路在接收到第一边缘时提供脉冲，并且在由延迟链产生的延迟之后去除脉冲。 然而，第二个相反的边缘复位电路，而没有中间延迟链延迟。 延迟链可以使用一系列AND电路（单次高电平）或OR电路（一次性低电平）来实施，每个电路由链中的前一个电路和输入信号驱动。 在一些实施例中，输出电路包括耦合在单触发输入和输出端子之间的通过栅极以及当不施加脉冲时提供无效值的下拉（单次高电平）或上拉（一次低电平） 。 传递门和上拉或下拉由菊花链的输出控制。 其他实施例提供可编程能力，例如通过改变延迟链的有效延迟来校正过程偏移的能力。

公开(公告)号：US06404277B1

公开(公告)日：2002-06-11

申请号：US09709310

申请日：2000-11-13

Applicant: Kyeongho Lee ,  Deog-Kyoon Jeong

Inventor： Kyeongho Lee ,  Deog-Kyoon Jeong

IPC: H03K501

CPC classification number: H04B1/28 ,  H03F2200/372 ,  H03H11/22 ,  H03H2011/0494 ,  H03K9/00 ,  H03L7/0891 ,  H03L7/0995 ,  H03L7/1974 ,  H04B1/40 ,  H04B1/403

Abstract: A tuning circuit for an RF communications system and method includes a master block that outputs a control signal to a slave block. The master block can include a first filter having a high pass filter and a low pass filter that each receive the control signal, a first rectifier coupled to the high pass filter, a second rectifier coupled to the low pass filter, and a converter coupled to the first and second rectifiers that outputs the control signal. The first filter is preferably a gm-C poly-phase filter. Output signals of the gm-C poly-phase filter include high and low pass filtering signals resulting from similarly configured circuits so that the output signals have the same electrical characteristics, which results in an increased accuracy, for example, in a cut-off frequency.