DISPLAY PANEL AND DRIVING CIRCUIT THEREOF
    11.
    发明申请

    公开(公告)号:US20180108319A1

    公开(公告)日:2018-04-19

    申请号:US15112137

    申请日:2016-05-12

    CPC classification number: G09G3/3688 G02F1/136286

    Abstract: A driving circuit for a display panel is disclosed. The driving circuit includes at least a driving signal line connected to a display driving signal transmission unit delivering display driving signal produced by the display driving signal transmission unit to sub-pixels of the display panel through the driving signal line; and a number of data signal lines connected to a display data provision unit delivering display data signal produced by the display data provision unit to the sub-pixels. For each subset of the sub-pixels that are of a same component color, at least two data signal lines, starting from different points of time, deliver display data signal to the subset of sub-pixels that are of the same component color. The driving circuit effectively resolves glitches to input signal resulted from heavy transient load to the input signal.

    DRIVING SYSTEMS OF DISPLAY PANELS
    14.
    发明申请

    公开(公告)号:US20180218663A1

    公开(公告)日:2018-08-02

    申请号:US15327633

    申请日:2017-01-13

    Abstract: The present disclosure relates to a driving system of display panels. The driving system includes a main board and a display panel. The main board is configured with a driving chip, and the driving chip electrically connects to the display panel via a flexible circuit board to drive the display panel to display. With such configuration, the driving system is configured with the main board and the driving chip, and the driving chip is arranged on the main board, instead of the flexible circuit board. With such configuration, the space of the display area occupied by the components is reduced so as to realize the narrow border design for a top border and a bottom border of the display panel. In this way, the screen ratio of the display panel is increased.

    GAMMA VOLTAGE GENERATION CIRCUIT AND DRIVE APPARATUS

    公开(公告)号:US20180197492A1

    公开(公告)日:2018-07-12

    申请号:US15126501

    申请日:2016-08-10

    Abstract: The present application discloses a gamma voltage generating circuit, including an image detection module, a control module and a gamma voltage module; the image detection module is for acquiring an image input signal, and detecting the image input signal, when determining the gray scale indicated by the image input signal comprising a pure color gray scale, to generate and output a first detection result signal for indicating the pure color gray scale; the control module is electrically connected to the image detection module, for receiving the first detection result signal output from the image detection module and generating and outputting a first control signal in accordance with the first detection result signal; and the gamma voltage module is electrically connected to the control module to receive the first control signal output from the control module, and generate a gamma reference voltage in accordance with the first control signal.

    ELIMINATION METHOD OF PARASITIC CAPACITANCE AND DEVICE

    公开(公告)号:US20180173359A1

    公开(公告)日:2018-06-21

    申请号:US15300254

    申请日:2016-08-12

    Abstract: The disclosure discloses an elimination method of parasitic capacitance and a device. During a touch scanning period, inputting a first simulation signal to source electrode lines and inputting a second simulation signal to multiplex lines can eliminate parasitic capacitance. Waveforms of the first simulation signal and a touch scanning signal input in a common electrode are identical or similar, waveforms of the second simulation signal and the touch scanning signal input in the common electrode are similar, waveforms of the third simulation signal and the touch scanning signal input in the common electrode are similar, a second simulation waveform includes a first target high level, a second target high level, a first target low level and a second target low level that are generated by different modules, the first target high level>the second target high level>the first target low level>the second target low level.

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