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公开(公告)号:US11817044B1
公开(公告)日:2023-11-14
申请号:US18050935
申请日:2022-10-28
Inventor: Haiming Cao , Chao Tian , Fei Ai , Guanghui Liu
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/0852 , G09G2310/027 , G09G2320/0233 , G09G2320/0633
Abstract: The present application provides a pixel driving circuit and a display panel. The pixel driving circuit includes an amplitude regulating module and a pulse width modulation module, where the amplitude regulating module and the pulse width modulation module are both electrically connected to a first node, so that the pulse width modulation module and the amplitude modulation module are configured to cooperate with a first data signal and a second data signal, respectively, to realize regulation of both the pulse width and the amplitude of the valid pulse of the driving current signal for driving the light emitting device to emit light. As such, the valid pulse of the driving current signal has different pulse widths and different amplitudes under correspondingly different gray scale states, so that the light emitting brightness and the light emitting duration of the light emitting device under correspondingly different gray scale states are different.
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12.
公开(公告)号:US11749223B2
公开(公告)日:2023-09-05
申请号:US17057667
申请日:2020-09-17
Inventor: Haiming Cao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3688 , G09G2300/0852 , G09G2310/0291 , G09G2310/0294 , G09G2310/08
Abstract: The present disclosure provides a pixel driving circuit and a display panel. After pre-charging a first node to a first electrical potential, raising it to a second electrical potential through a first capacitor by a current row gate output signal G(n), and then raising it to a third electrical potential which is a high electrical potential greater than an electrical potential of the current row gate output signal G(n), so that a first transistor is turned on and data is written, raising an original electrical potential of a gate and improving driving capability since a gate electrical potential of the first transistor can be raised to greater than the G(n).
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公开(公告)号:US11362118B2
公开(公告)日:2022-06-14
申请号:US16756350
申请日:2019-11-15
Inventor: Juncheng Xiao , Chao Tian , Yanqing Guan , Haiming Cao
IPC: H01L27/00 , H01L27/12 , G09G3/3225 , G09G3/36
Abstract: The present invention provides an array substrate, a manufacturing method thereof, and a display panel. Orthographic projections of channel layers of two types of thin film transistors in a design of a driving circuit on the array substrate at least partially overlap, that is, two thin film transistors are stacked on top of each other, thereby facilitating a narrow border design of the display panel. In addition, a channel layer of one of the thin film transistors is an amorphous oxide semiconductor layer, which can reduce node leakage in the driving circuit, which is conducive to improving circuit stability and reducing power consumption.
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公开(公告)号:US12154470B2
公开(公告)日:2024-11-26
申请号:US17617608
申请日:2021-10-29
Inventor: Haiming Cao , Yanqing Guan , Chao Tian , Fei Ai , Guanghui Liu , Zhifu Li
IPC: G09G3/20 , G09G3/3266 , G09G3/36 , H01L29/786
Abstract: A gate driving circuit and a display panel are disclosed. A pull-up control module and a pull-down module of each stage gate driving unit are connected to a first node. A thin film transistor in the pull-up control module and/or pull-down module that is connected to the first node is an oxide thin film transistor, such that a leakage current of the first node is reduced due to the advantage of the small off-state leakage current of the oxide thin film transistor. Therefore, the voltage level of the first node can remain stable during a pull-up stage and a touch suspension stage.
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公开(公告)号:US12014666B2
公开(公告)日:2024-06-18
申请号:US17976803
申请日:2022-10-30
Inventor: Haiming Cao , Chao Tian , Fei Ai , Guanghui Liu
IPC: G09G3/32 , G09G3/20 , G09G3/3233
CPC classification number: G09G3/2014 , G09G3/32 , G09G2300/0842 , G09G2310/0264 , G09G2310/08 , G09G2320/0242 , G09G2320/0633
Abstract: A pixel driving circuit and a display panel are provided. The pixel driving circuit includes a data writing module, a data conversion module, and a current driving module. The data writing module is electrically connected to a first node and configured to transmit a data signal to the first node. The data conversion module is electrically connected to the first node, a second node, and a modulation signal source, and configured to generate a current driving control signal, and to output the current driving control signal to the second node. The current driving module is electrically connected to the second node, a light-emitting control wire, and a light-emitting device, and configured to control the light-emitting device to emit light. An effective pulse of the current driving control signal has different pulse widths in different gray-scale states.
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公开(公告)号:US20230402019A1
公开(公告)日:2023-12-14
申请号:US17419876
申请日:2021-05-31
Inventor: Yanqing Guan , Chao Tian , Haiming Cao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0876
Abstract: A display panel and a gate driving circuit are provided. The gate driving circuit utilizes the pull-down control module to periodically pull up and pull down the voltage level of the second node. The voltage level of the second node is periodically a high voltage level. This effectively reduces the time duration when the second node corresponds to the high voltage level. After the TFTs electrically connected to the second node are forward biased, the TFTs could have sufficient recovery time. This solution effectively improves the bias condition of the TFTs in the pull-down control module and thus makes the circuit more stable and raises the reliability of the circuit.
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公开(公告)号:US11715436B2
公开(公告)日:2023-08-01
申请号:US17281600
申请日:2021-03-15
Inventor: Chao Tian , Haiming Cao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0819
Abstract: In a GOA circuit provided by the present disclosure, a unidirectional feedback circuit is adopted between a first node and a second node of the GOA circuit of the present disclosure, which can reduce complexity of circuit design, make it easier to achieve linear design and in-plane integration, prevent point competition of the first node and the second node, and improve stability of the circuit.
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公开(公告)号:US11705032B2
公开(公告)日:2023-07-18
申请号:US16961956
申请日:2020-06-12
Inventor: Haiming Cao , Yanqing Guan
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2300/0426 , G09G2310/0283 , G09G2310/08 , G09G2330/021
Abstract: A driving circuit and a display panel are disclosed. The driving circuit includes a plurality of cascaded driving units. The driving unit includes a forward/backward scan control module, a first control node controlling module, a second control node controlling module, a global control module, a regulating module, a first output module configured to output a stage signal, and a second output module configured to output a gate driving signal. A voltage level of the gate driving signal is higher than a voltage level of the stage signal.
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