公开(公告)号：US20180350669A1

公开(公告)日：2018-12-06

申请号：US16049187

申请日：2018-07-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsin-Yen HUANG ,  Kai-Fang CHENG ,  Chi-Lin TENG ,  Shao-Kuan LEE ,  Hai-Ching CHEN

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L21/76865 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295

Abstract: A semiconductor device includes a first metal wiring layer, an interlayer insulating layer formed over the first metal layer, a second metal wiring structure embedded in the interlayer dielectric layer and connected to the first metal wiring layer, and an etch-stop layer disposed between the first metal wiring and the first interlayer dielectric layer. The etch-stop layer includes one or more sub-layers. The etch-stop layer includes a first sub-layer made of an aluminum-based insulating material, hafnium oxide, zirconium oxide or titanium oxide.