公开(公告)号：US20220123207A1

公开(公告)日：2022-04-21

申请号：US17074843

申请日：2020-10-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Chiang Min ,  Chang-Chih Huang ,  Yuan-Tai Tseng ,  Kuo-Chyuan Tzeng ,  Yihuei Zhu

IPC: H01L45/00 ,  H01L27/24

Abstract: Some embodiments relate to a memory device. The memory device includes a first electrode overlying a substrate. A data storage layer overlies the first electrode. A second electrode overlies the data storage layer. A conductive bridge is selectively formable within the data storage layer to couple the first electrode to the second electrode. An active metal layer is disposed between the data storage layer and the second electrode. A buffer layer is disposed between the active metal layer and the second electrode. The buffer layer has a lower reactivity to oxygen than the active metal layer.