公开(公告)号：US20200218655A1

公开(公告)日：2020-07-09

申请号：US16828236

申请日：2020-03-24

申请人： Toshiba Memory Corporation

发明人： Shinichi KANNO

IPC分类号： G06F12/06 ,  G06F12/02 ,  G11C29/00 ,  G06F3/06

摘要： According to one embodiment, a storage system includes a controller. The controller receives, from a host, a write command including a block address indicating a first block in a plurality of blocks, and a page address indicating a first page of the first block. The controller writes data designated by the write command to the first page of the first block. The controller notifies the host 2 of a page address indicating a latest readable page which is included in pages of the first block, the pages containing data which was written by the host before the designated data was written to the first page, the latest readable page having become readable by writing the designated data to the first page.

公开(公告)号：US20200089430A1

公开(公告)日：2020-03-19

申请号：US16353293

申请日：2019-03-14

申请人： TOSHIBA MEMORY CORPORATION

发明人： Shinichi KANNO

IPC分类号： G06F3/06 ,  G06F11/07

摘要： According to one embodiment, a memory system is connectable to a host. The memory system includes a nonvolatile memory and a controller. The nonvolatile memory includes a plurality of blocks. The controller is electrically coupled to the nonvolatile memory. The controller controls the nonvolatile memory. When receiving, from the host, a first command for changing a state of an allocated block to a reallocatable state in a case where a second command that is yet to be executed or being executed involving read of data from the allocated block has been received from the host, the controller changes the state of the allocated block to the reallocatable state after the second command is finished.

公开(公告)号：US20190332316A1

公开(公告)日：2019-10-31

申请号：US16351993

申请日：2019-03-13

申请人： TOSHIBA MEMORY CORPORATION

发明人： Shinichi KANNO ,  Hideki YOSHIDA ,  Naoki ESAKA ,  Hiroshi NISHIMURA

IPC分类号： G06F3/06 ,  G06F12/1009

摘要： According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.

公开(公告)号：US20190317691A1

公开(公告)日：2019-10-17

申请号：US16126038

申请日：2018-09-10

申请人： Toshiba Memory Corporation

发明人： Shinichi KANNO

IPC分类号： G06F3/06

摘要： According to one embodiment, a memory system stores write data received from a host to a shared write buffer for write destination blocks, acquires first write data for plural pages from the shared write buffer, and writes the first write data to a first write destination block by a first-step write operation. When receiving write data from the host in a state in which an empty region does not exist in the shared write buffer, the memory system discards write data in the shared write buffer in which the first-step write operation has been finished. In a case where the first write data do not exist in the shared write buffer when a second-step write operation of the first write data is to be executed, the memory system transmits a request to acquire the first write data to the host.

公开(公告)号：US20190220197A1

公开(公告)日：2019-07-18

申请号：US16364280

申请日：2019-03-26

申请人： Toshiba Memory Corporation

发明人： Hirokuni YANO ,  Shinichi KANNO ,  Toshikatsu HIDA ,  Hidenori MATSUZAKI ,  Kazuya KITSUNAI ,  Shigehiro ASANO

IPC分类号： G06F3/06 ,  G06F12/02 ,  G11C11/56

CPC分类号： G06F3/0604 ,  G06F3/0616 ,  G06F3/0631 ,  G06F3/064 ,  G06F3/0656 ,  G06F3/0658 ,  G06F3/0679 ,  G06F3/0685 ,  G06F12/0246 ,  G06F12/0804 ,  G06F12/0866 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7209 ,  G11C11/5628

摘要： A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.

公开(公告)号：US20190205067A1

公开(公告)日：2019-07-04

申请号：US16294565

申请日：2019-03-06

申请人： TOSHIBA MEMORY CORPORATION

发明人： Daisuke HASHIMOTO ,  Shinichi KANNO

IPC分类号： G06F3/06 ,  G06F12/02

CPC分类号： G06F3/0679 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0652 ,  G06F12/0246 ,  G06F12/0253 ,  G06F2212/1016 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7209

摘要： A storage device includes a non-volatile semiconductor storage device including a plurality of physical blocks, and a controller. The controller is configured to maintain a mapping of logical addresses to locations within the physical blocks, send, to a host, a first list that contains logical addresses corresponding to one or more target physical block that are targeted for garbage collection, and then receive, from the host, a second list that contains one or more logical addresses in the first list, and invalidate data stored in the logical addresses in the second list prior to the garbage collection.

公开(公告)号：US20190108120A1

公开(公告)日：2019-04-11

申请号：US16210826

申请日：2018-12-05

申请人： Toshiba Memory Corporation

发明人： Shinichi KANNO

IPC分类号： G06F12/02 ,  G06F12/1009 ,  G06F3/06

CPC分类号： G06F12/0246 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0647 ,  G06F3/0679 ,  G06F12/1009 ,  G06F2212/1044 ,  G06F2212/2022 ,  G06F2212/7201 ,  G06F2212/7205

摘要： According to one embodiment, a memory system includes a nonvolatile memory including a plurality of blocks and a controller. The controller manages a garbage collection count for each of blocks containing data written by a host, the garbage collection count indicating the number of times the data in said each of the blocks has been copied by a garbage collection operation of the nonvolatile memory. The controller selects, as garbage collection target blocks, first blocks associated with a same garbage collection count. The controller copies valid data in the first blocks to a copy destination free block. The controller sets, as a garbage collection count of the copy destination free block, a value obtained by adding one to a garbage collection count of the first blocks.

公开(公告)号：US20180088811A1

公开(公告)日：2018-03-29

申请号：US15446796

申请日：2017-03-01

申请人： Toshiba Memory Corporation

发明人： Shinichi KANNO

IPC分类号： G06F3/06 ,  G06F12/02

CPC分类号： G06F3/0604 ,  G06F3/0608 ,  G06F3/0638 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1044 ,  G06F2212/214 ,  G06F2212/401 ,  G06F2212/7201 ,  G06F2212/7205

摘要： A storage device includes a nonvolatile storage and a controller. The controller is configured to compress data received from a host in association with a write command designating a first data length as a length of the data and a starting logical address of the data, into compressed data of a second data length shorter than the first data length, write the compressed data in the nonvolatile storage. Further, the controller is configured to generate an address mapping for the data, such that a first logical address range that starts at the starting logical address is mapped to a physical region of the nonvolatile storage having a size equal to the second data length, and a second logical address range that directly follows the first logical address range is not mapped to any physical region of the nonvolatile storage.

公开(公告)号：US20180039417A1

公开(公告)日：2018-02-08

申请号：US15785860

申请日：2017-10-17

申请人： Toshiba Memory Corporation

发明人： Shinichi KANNO

IPC分类号： G06F3/06 ,  G06F12/02 ,  G11C29/52

摘要： According to one embodiment, a memory system includes a nonvolatile memory including physical blocks, and a controller. The controller manages namespaces. The namespaces include at least a first namespace for storing a first type of data, and a second namespace for storing a second type of data having a lower update frequency than the first type of data. The controller allocates a first number of physical blocks as a physical resource for the first namespace, and allocates a second number of physical blocks as a physical resource for the second namespace, based on a request from a host device specifying an amount of physical resources to be secured for each of the namespaces.

公开(公告)号：US20220058117A1

公开(公告)日：2022-02-24

申请号：US17499825

申请日：2021-10-12

申请人： Toshiba Memory Corporation

发明人： Shinichi KANNO ,  Hideki YOSHIDA

IPC分类号： G06F12/02 ,  G06F3/06

摘要： According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address, a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.