SWITCH MODE POWER SUPPLY SYSTEM
    11.
    发明申请

    公开(公告)号:US20230122886A1

    公开(公告)日:2023-04-20

    申请号:US17702682

    申请日:2022-03-23

    Abstract: In one example, a controller circuit is configured to: receive a first measurement signal representing a power converter input voltage; receive a second measurement signal representing a power converter output voltage; receive an indication of whether a voltage across a switch is positive during a state change of the switch; based on the first and second measurement signals and the indication, determine: a charging interval; a first dead time interval after the charging interval; a discharging interval; and a second dead time interval after the discharging interval; and provide a first control signal at the first control output, and provide a second control signal at the second control output, in which the states of the first and second control signals vary across the charging interval, the first and second dead time intervals, and the discharging the interval.

    Controlling bi-directional switching devices

    公开(公告)号:US11004942B2

    公开(公告)日:2021-05-11

    申请号:US15859429

    申请日:2017-12-30

    Abstract: In some examples, a system comprises a bi-directional gallium nitride (GaN) device including first and second switches and a substrate, the first switch including a first gate and a first source, the second switch including a second gate and a second source, and the substrate shared between the first and second switches. The system include a third switch coupled to the first source and the substrate. The system includes a fourth switch coupled to the second source and the substrate and a comparator having inputs coupled to the first and second sources and outputs coupled to the third and fourth switches.

    HYSTERIC CONTROL FOR RESONANT CONVERTERS

    公开(公告)号:US20250070656A1

    公开(公告)日:2025-02-27

    申请号:US18453956

    申请日:2023-08-22

    Abstract: An apparatus includes a resonant converter controller having a converter voltage sensing terminal, a reference voltage terminal, a converter current sensing terminal, first and second converter capacitor terminals, and first and second control outputs. The resonant converter controller is configured to: receive a current sensing signal at the converter current sensing terminal; generate a first signal based on the current sensing signal; generate a second signal representing a difference between a first voltage at the converter voltage sensing terminal and a reference voltage at the reference voltage terminal; and generate first and second switching signals at, respectively, the first and second control outputs responsive to the first signal, the second signal, and a capacitor voltage between the first and second converter capacitor terminals to regulate the first voltage based on the reference voltage.

    INTEGRATED DEVICES WITH CONDUCTIVE BARRIER STRUCTURE

    公开(公告)号:US20240405078A1

    公开(公告)日:2024-12-05

    申请号:US18326698

    申请日:2023-05-31

    Abstract: The present disclosure generally relates to integrated devices with a conductive barrier structure. In an example, a semiconductor device includes a substrate, a conductive barrier structure, a channel layer, a barrier layer, a gate, and a conductive structure. The substrate is of a first semiconductor material. The conductive barrier structure is on the substrate. The channel layer is of a second semiconductor material and is on the conductive barrier structure. The barrier layer is on the channel layer, and the channel layer is between the barrier layer and the conductive barrier structure. The gate is over the barrier layer opposing the channel layer. The conductive structure is electrically coupled between the conductive barrier structure, the channel layer, and the barrier layer.

    ADJUSTABLE POWER FET DRIVER
    16.
    发明公开

    公开(公告)号:US20240146298A1

    公开(公告)日:2024-05-02

    申请号:US17977822

    申请日:2022-10-31

    CPC classification number: H03K17/6871 H03K5/13 H03K2005/00019

    Abstract: In described examples, an integrated circuit includes first and second current sources, first and second switches, a dV/dt phase detector, a control circuit, and source, gate, and drain terminals for coupling to, respectively, a source, gate, and drain of a power FET. The first switch is coupled between the first current source and the gate terminal. The second switch is coupled between the second current source and the gate terminal. The dV/dt phase detector detects a dV/dt phase of the power FET and outputs to the control circuit. The control circuit controls the first and second switches to perform a turn-on sequence of the power FET, including: closing the first switch while keeping the second switch open; and after receiving a signal from the dV/dt phase detector indicating the dV/dt phase has started, opening the first switch, and closing the second switch.

    ENHANCEMENT MODE STARTUP CIRCUIT WITH JFET EMULATION

    公开(公告)号:US20210265992A1

    公开(公告)日:2021-08-26

    申请号:US17314523

    申请日:2021-05-07

    Abstract: A startup circuit adapted to be coupled to an input voltage supply and operable to supply an output voltage at an output terminal, the startup circuit including: a first transistor having a first control terminal, a first current terminal and a second current terminal, the first current terminal adapted to be coupled to the input voltage supply and the second current terminal coupled to the output terminal; a precharge circuit having a first terminal, a second terminal and a third terminal, the second terminal adapted to be coupled to the input voltage supply and the third terminal coupled to the first control terminal; a current limiter coupled to the precharge circuit, the first control terminal and the second current terminal; a second transistor having a second control terminal, a third current terminal and a fourth current terminal, the third current terminal coupled to the precharge circuit and the second control terminal adapted to be coupled to a control signal; and a third transistor having a third control terminal, a fifth current terminal and a sixth current terminal, the fifth current terminal coupled to the first control terminal and the third control terminal is adapted to be coupled to the control signal.

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