公开(公告)号：US11856803B2

公开(公告)日：2023-12-26

申请号：US17365426

申请日：2021-07-01

Applicant: Samsung Display Co., Ltd.

Inventor： Tae Woo Lim ,  Bon-Yong Koo ,  Hyungjune Kim ,  Eunje Jang ,  Jang-Bog Ju

IPC: H10K59/38 ,  H01L33/08 ,  H01L27/15 ,  H10K59/124 ,  H10K59/121 ,  H10K71/00

CPC classification number: H10K59/38 ,  H01L27/156 ,  H01L33/08 ,  H10K59/124 ,  H10K59/1213 ,  H10K71/00

Abstract: A display apparatus includes: a substrate; a pixel circuit layer on the substrate and including a thin-film transistor; a display element layer on the pixel circuit layer and including a display element electrically connected to the thin-film transistor; a color filter layer on the display element layer and including a color filter overlapping the display element and a black matrix having a first side contacting the color filter and a second side extending in an edge direction of the substrate; and a blocking layer between the black matrix and the substrate, wherein a tip end of the blocking layer has no step difference with an end of the black matrix.

公开(公告)号：US11037484B2

公开(公告)日：2021-06-15

申请号：US16502438

申请日：2019-07-03

Applicant: Samsung Display Co., Ltd.

Inventor： Bon-Yong Koo ,  Dong Yeon Son

IPC: G09G3/20 ,  G09G3/36 ,  H01L27/12

Abstract: Provided is a display device, more particularly, a display device including a gate driver. The display device includes: a plurality of pixels; a plurality of gate lines connected to the plurality of pixels; a gate driver including a plurality of stages outputting gate signals to the plurality of gate lines; a clock signal wiring transferring a clock signal to the gate driver; a voltage wiring transferring an off voltage to the gate driver, in which the clock signal wiring is positioned at a first side of the gate driver, and the voltage wiring is positioned at a second side facing the first side of the gate driver.

公开(公告)号：US09477122B2

公开(公告)日：2016-10-25

申请号：US14456119

申请日：2014-08-11

Applicant: Samsung Display Co., Ltd.

Inventor： Bon-Yong Koo ,  Dong Yeon Son

IPC: G02F1/1345 ,  G09G3/36

CPC classification number: G02F1/1345 ,  G02F1/13454 ,  G09G3/36 ,  G09G3/3648 ,  G09G2300/0408

Abstract: A display device is provided. A display device according to an exemplary embodiment of the present invention includes a display panel including: a display area where a plurality of pixels are disposed and a peripheral area near the display area; and a gate driver disposed in the peripheral area and including a transistor unit and a common voltage application unit, wherein the common voltage application unit overlaps via a first insulating layer disposed on the transistor unit.

Abstract translation: 提供显示装置。 根据本发明的示例性实施例的显示装置包括：显示面板，包括：多个像素的显示区域和显示区域附近的周边区域; 以及设置在所述周边区域中并包括晶体管单元和公共电压施加单元的栅极驱动器，其中所述公共电压施加单元经由设置在所述晶体管单元上的第一绝缘层重叠。

公开(公告)号：US08760598B2

公开(公告)日：2014-06-24

申请号：US13946674

申请日：2013-07-19

Applicant: Samsung Display Co., Ltd.

Inventor： Jong-Hyuk Lee ,  Bon-Yong Koo ,  Sun-Mi Kim ,  Ju Hyeon Baek ,  Ji Young Jeong

IPC: G02F1/1343 ,  G02F1/1333 ,  G02F1/13

CPC classification number: H01L33/08 ,  G02F1/133514 ,  G02F1/136213 ,  G02F1/136259 ,  G02F2001/136263 ,  G02F2001/136272 ,  H01L22/14 ,  H01L27/124 ,  H01L29/41733 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A thin film transistor array panel includes: a substrate; a gate line and a storage electrode that are disposed on the substrate; a data line that crosses the gate line and storage electrode line; a thin film transistor that is connected with the gate line and data line; and a pixel electrode that is connected to the thin film transistor. The storage electrode includes a first storage electrode that is parallel to the gate line, second storage electrodes that extend on opposing sides of the data line from the first storage electrode, a connection part that crosses the data line and connects pairs of the second storage electrodes, and a connection bridge that crosses the gate line and connects a second storage electrode to a second storage electrode of an adjacent pixel.

Abstract translation: 薄膜晶体管阵列面板包括：基板; 栅极线和存储电极，设置在所述基板上; 跨越栅极线和存储电极线的数据线; 与栅极线和数据线连接的薄膜晶体管; 以及连接到薄膜晶体管的像素电极。 存储电极包括与栅极线平行的第一存储电极，从第一存储电极在数据线的相对侧延伸的第二存储电极，与数据线交叉并连接成对的第二存储电极的连接部分 以及跨越栅极线并将第二存储电极连接到相邻像素的第二存储电极的连接桥。

公开(公告)号：US12207522B2

公开(公告)日：2025-01-21

申请号：US18395414

申请日：2023-12-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Tae Woo Lim ,  Bon-Yong Koo ,  Hyungjune Kim ,  Eunje Jang ,  Jang-Bog Ju

IPC: H10K59/38 ,  H01L27/15 ,  H01L33/08 ,  H10K59/121 ,  H10K59/124 ,  H10K71/00

Abstract: A display apparatus includes: a substrate; a pixel circuit layer on the substrate and including a thin-film transistor; a display element layer on the pixel circuit layer and including a display element electrically connected to the thin-film transistor; a color filter layer on the display element layer and including a color filter overlapping the display element and a black matrix having a first side contacting the color filter and a second side extending in an edge direction of the substrate; and a blocking layer between the black matrix and the substrate, wherein a tip end of the blocking layer has no step difference with an end of the black matrix.

公开(公告)号：US12057059B2

公开(公告)日：2024-08-06

申请号：US18324950

申请日：2023-05-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Bon-Yong Koo ,  Sujin Lee ,  Jaeyong Jang

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2320/0214

Abstract: A display substrate includes: a pixel circuit including: a switching transistor connected between a first terminal of a compensation capacitor and a data line; and a pixel transistor connected between a second terminal of the compensation capacitor and a first voltage line, the pixel transistor to receive a test voltage; and a test transistor including: a test gate terminal to receive a test signal; a test source terminal electrically connected to the first voltage line; and a test drain terminal electrically connected to the data line.

公开(公告)号：US09780177B2

公开(公告)日：2017-10-03

申请号：US15369008

申请日：2016-12-05

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Hwan Hwang ,  Bon-Yong Koo ,  Soo Jin Park ,  Jong-Moon Park ,  Yong Hee Lee ,  Jong-Hyuk Lee ,  Duc-Han Cho

IPC: H01L29/04 ,  H01L29/417 ,  H01L27/12 ,  H01L27/15

CPC classification number: H01L29/41733 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/156 ,  H01L29/41775

Abstract: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.

公开(公告)号：US09627415B2

公开(公告)日：2017-04-18

申请号：US14274541

申请日：2014-05-09

Applicant: Samsung Display Co., Ltd.

Inventor： Bon-Yong Koo ,  Dong Yeon Son

IPC: H01L27/12 ,  G09G3/36

CPC classification number: G09G3/2092 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  H01L27/124

Abstract: Provided is a display device, more particularly, a display device including a gate driver. The display device includes: a plurality of pixels; a plurality of gate lines connected to the plurality of pixels; a gate driver including a plurality of stages outputting gate signals to the plurality of gate lines; a clock signal wiring transferring a clock signal to the gate driver; a voltage wiring transferring an off voltage to the gate driver; in which the clock signal wiring is positioned at a first side of the gate driver, and the voltage wiring is positioned at a second side facing the first side of the gate driver.

公开(公告)号：US09437148B2

公开(公告)日：2016-09-06

申请号：US14262414

申请日：2014-04-25

Applicant: Samsung Display Co., Ltd.

Inventor： Bon-Yong Koo ,  Dong Yeon Son

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0286

Abstract: The output stage of a monolithically integrated gate lines driver circuit of a display device has a capacitor boosted, source-follower configuration in which a relatively large area transistor (Tr1) receives drive power at its drain from a clock signal providing rail (CK), a source of the transistor drives a respective gate line and a relatively large area boost capacitor (C1) connects to gate and the source of the transistor. In order to reduce consumption of substrate area, the relatively large area boost capacitor is laid out to overlap the transistor while a relatively thick first insulating layer of relatively low dielectric constant positioned between the transistor and the overlying boost capacitor.

Abstract translation: 显示装置的单片集成栅线驱动电路的输出级具有电容升压的源极跟随器配置，其中较大面积的晶体管（Tr1）在其漏极处从时钟信号提供轨（CK）接收驱动功率， 晶体管的源极驱动相应的栅极线，并且相对较大的区域升压电容器（C1）连接到晶体管的栅极和源极。 为了减少衬底面积的消耗，相对较大的面积升压电容器布置成与晶体管重叠，而位于晶体管和上覆升压电容器之间的相对较薄介电常数相对较厚的第一绝缘层。

公开(公告)号：US09093593B2

公开(公告)日：2015-07-28

申请号：US13946652

申请日：2013-07-19

Applicant: Samsung Display Co., Ltd.

Inventor： Jong-Hyuk Lee ,  Bon-Yong Koo ,  Sun-Mi Kim ,  Ju Hyeon Baek ,  Ji Young Jeong

IPC: G02F1/13 ,  H01L33/08 ,  H01L27/12 ,  G02F1/1335 ,  G02F1/1362 ,  H01L21/66 ,  H01L29/417

CPC classification number: H01L33/08 ,  G02F1/133514 ,  G02F1/136213 ,  G02F1/136259 ,  G02F2001/136263 ,  G02F2001/136272 ,  H01L22/14 ,  H01L27/124 ,  H01L29/41733 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A thin film transistor array panel includes: a substrate; a gate line and a storage electrode that are disposed on the substrate; a data line that crosses the gate line and storage electrode line; a thin film transistor that is connected with the gate line and data line; and a pixel electrode that is connected to the thin film transistor. The storage electrode includes a first storage electrode that is parallel to the gate line, second storage electrodes that extend on opposing sides of the data line from the first storage electrode, a connection part that crosses the data line and connects pairs of the second storage electrodes, and a connection bridge that crosses the gate line and connects a second storage electrode to a second storage electrode of an adjacent pixel.

Abstract translation: 薄膜晶体管阵列面板包括：基板; 栅极线和存储电极，设置在所述基板上; 跨越栅极线和存储电极线的数据线; 与栅极线和数据线连接的薄膜晶体管; 以及连接到薄膜晶体管的像素电极。 存储电极包括与栅极线平行的第一存储电极，从第一存储电极在数据线的相对侧延伸的第二存储电极，与数据线交叉并连接成对的第二存储电极的连接部分 以及跨越栅极线并将第二存储电极连接到相邻像素的第二存储电极的连接桥。