公开(公告)号：US20150054801A1

公开(公告)日：2015-02-26

申请号：US14170882

申请日：2014-02-03

Applicant: Samsung Display Co., Ltd.

Inventor： HEE-JEONG SEO ,  Jang-Hoon Kwak ,  Eun-Kyung Kim ,  Jae Hyoung Park ,  Jong-Young Yun ,  Jun Pyo Lee

IPC: G09G3/20 ,  G09G3/22 ,  G09G5/18

CPC classification number: G09G3/2085 ,  G09G3/2096 ,  G09G3/22 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0278

Abstract: A display device includes: a control board on which a timing controller (TCON) and a power management integrated circuit (PMIC) are installed; a first source board on which a driving integrated circuit (IC) is installed; and a first connection cable that connects the control board and the first source board. The control board includes a first sensing line that connects the PMIC to the first connection cable and a third feedback line that connects the first connection cable to the TCON, the first connection cable includes a second sensing line that connects the first sensing line to the first source board and a second feedback line that connects the third feedback line to the first source board, and the first source board includes a third sensing line connected to the second sensing line and a first feedback line connected to the second feedback line.

Abstract translation: 显示装置包括：控制板，其上安装有时序控制器（TCON）和电源管理集成电路（PMIC）; 安装有驱动集成电路（IC）的第一源极板; 以及连接控制板和第一源板的第一连接电缆。 控制板包括将PMIC连接到第一连接电缆的第一传感线和将第一连接电缆连接到TCON的第三反馈线，第一连接电缆包括将第一传感线连接到第一传感线的第二传感线 源极板和将第三反馈线连接到第一源极板的第二反馈线，并且第一源极板包括连接到第二感测线的第三感测线和连接到第二反馈线的第一反馈线。

公开(公告)号：US20140253418A1

公开(公告)日：2014-09-11

申请号：US13940444

申请日：2013-07-12

Applicant: Samsung Display Co., Ltd.

Inventor： KI-HYUN PYUN ,  Jang-Hoon Kwak ,  Jung-Hoon Ku ,  Jin-Ki Kim ,  Seung-Woon Shin ,  Jun-HO Hwang

IPC: G09G3/36 ,  H03K17/00

CPC classification number: G09G3/3696 ,  G09G3/3677 ,  G09G2330/12

Abstract: A gate driving module includes a gate driver and a gate signal generator. The gate driver generates a vertical start signal, a plurality of gate clock signals and a plurality of inverse gate clock signals based on a vertical start control signal, a plurality of gate clock control signals, a gate on voltage, a first gate off voltage and a second gate off voltage. The number of the gate clock signals is P. The number of the inverse gate clock signals is P. The number of the gate clock control signals is P. P is a positive integer equal to or greater than two. The gate signal generator generates a gate signal based on the vertical start signal, the gate clock signals and the inverse gate clock signals.

Abstract translation: 栅极驱动模块包括栅极驱动器和栅极信号发生器。 栅极驱动器基于垂直启动控制信号，多个栅极时钟控制信号，栅极导通电压，第一栅极截止电压和第一栅极截止电压产生垂直起始信号，多个栅极时钟信号和多个反向栅极时钟信号，以及 第二栅极关断电压。 栅极时钟信号的数量为P.反向栅极时钟信号的数量为P.栅极时钟控制信号的数量为P.P为等于或大于2的正整数。 栅极信号发生器基于垂直起始信号，栅极时钟信号和反向栅极时钟信号产生栅极信号。