公开(公告)号：US20160027387A1

公开(公告)日：2016-01-28

申请号：US14563200

申请日：2014-12-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： MIN-YOUNG PARK ,  JEON-DOO LEE ,  SUNG-JUN KIM ,  YUN-MI KIM ,  KYUNG-HWA LIM ,  KI-HYUN PYUN

IPC: G09G3/34 ,  G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3611 ,  G09G2310/08 ,  G09G2320/0233

Abstract: A display device includes a display panel, a variable gate clock generator and a gate driver. The display panel includes a plurality of pixels coupled to a plurality of data lines and a plurality of gate lines, respectively. The variable gate clock generator generates a first variable gate clock signal and a second variable gate clock signal having respective duty ratios that are varied depending on a brightness of a frame image. The gate driver generates a plurality of gate driving signals for driving the gate lines in response to the first and second variable gate clock signals.

Abstract translation: 显示装置包括显示面板，可变门时钟发生器和栅极驱动器。 显示面板包括分别耦合到多条数据线和多条栅极线的多个像素。 可变门时钟发生器产生第一可变门时钟信号和具有根据帧图像的亮度而变化的各占空比的第二可变门时钟信号。 栅极驱动器响应于第一和第二可变栅极时钟信号产生用于驱动栅极线的多个栅极驱动信号。

公开(公告)号：US20140253418A1

公开(公告)日：2014-09-11

申请号：US13940444

申请日：2013-07-12

Applicant: Samsung Display Co., Ltd.

Inventor： KI-HYUN PYUN ,  Jang-Hoon Kwak ,  Jung-Hoon Ku ,  Jin-Ki Kim ,  Seung-Woon Shin ,  Jun-HO Hwang

IPC: G09G3/36 ,  H03K17/00

CPC classification number: G09G3/3696 ,  G09G3/3677 ,  G09G2330/12

Abstract: A gate driving module includes a gate driver and a gate signal generator. The gate driver generates a vertical start signal, a plurality of gate clock signals and a plurality of inverse gate clock signals based on a vertical start control signal, a plurality of gate clock control signals, a gate on voltage, a first gate off voltage and a second gate off voltage. The number of the gate clock signals is P. The number of the inverse gate clock signals is P. The number of the gate clock control signals is P. P is a positive integer equal to or greater than two. The gate signal generator generates a gate signal based on the vertical start signal, the gate clock signals and the inverse gate clock signals.

Abstract translation: 栅极驱动模块包括栅极驱动器和栅极信号发生器。 栅极驱动器基于垂直启动控制信号，多个栅极时钟控制信号，栅极导通电压，第一栅极截止电压和第一栅极截止电压产生垂直起始信号，多个栅极时钟信号和多个反向栅极时钟信号，以及 第二栅极关断电压。 栅极时钟信号的数量为P.反向栅极时钟信号的数量为P.栅极时钟控制信号的数量为P.P为等于或大于2的正整数。 栅极信号发生器基于垂直起始信号，栅极时钟信号和反向栅极时钟信号产生栅极信号。