Connection of several circuits of an electronic chip

    公开(公告)号:US11764151B2

    公开(公告)日:2023-09-19

    申请号:US17580055

    申请日:2022-01-20

    CPC classification number: H01L23/528 H01L23/50 H01L23/5226

    Abstract: An electronic chip includes a shared strip with first and second spaced apart portions extending along a direction of elongation and an intermediate connecting portion extending between the first and second portions. The second portion is connected to a pad that has a greater surface area than the second portion. The first portion is formed by a first plurality of metallic strips. Metallic strips of the first plurality of metallic strips that are adjacent and side by side are separated by a distance smaller than a width of those metallic strips. The second portion is formed by a second plurality of metallic strips. Metallic strips of the second plurality of metallic strips that are adjacent and side by side are separated by a distance smaller than a width of those metallic strips.

    LDO overshoot protection in a cascaded architecture

    公开(公告)号:US11703897B2

    公开(公告)日:2023-07-18

    申请号:US16810639

    申请日:2020-03-05

    CPC classification number: G05F1/56

    Abstract: In an embodiment, a method includes: receiving a main supply voltage; generating a first regulated output voltage with a DC-DC converter; providing the main supply voltage to a driver of a control terminal of an output transistor of an LDO; receiving, at an input terminal of the LDO, the first regulated output voltage; generating, at an output terminal of the LDO, a second regulated output voltage from the first regulated output voltage; and when the main supply voltage falls below a predetermined threshold, discharging a capacitor coupled to the input terminal of the LDO by activating a switch coupled to the input terminal of the LDO.

    Oscillator
    15.
    发明授权

    公开(公告)号:US11581880B2

    公开(公告)日:2023-02-14

    申请号:US17524306

    申请日:2021-11-11

    Abstract: Series of first ramps and second ramps are generated. A circuit delivers a first signal representative of the comparison of each first ramp with a set point and delivers a second signal representative of the comparison of each second ramp with the set point. Based on the first and second signals: a first ramp is stopped and a second ramp is started when the first ramp reaches the set point, and a second ramp is stopped and a first ramp is started when the second ramp reaches the set point. The value of the set point is modulated in response a maximum value of the first/second last ramp compared with the set point.

    Switched mode power supply circuit
    17.
    发明授权

    公开(公告)号:US10756628B2

    公开(公告)日:2020-08-25

    申请号:US16407425

    申请日:2019-05-09

    Abstract: An electronic circuit includes a switched-mode power supply powering a first load via a first linear voltage regulator. The first regulator includes a transistor. The substrate and the gate of the transistor are capable of being coupled to a node of application of a power supply voltage. A method of operating the circuit is also disclosed.

    ELECTRONIC POWER SUPPLY
    18.
    发明申请

    公开(公告)号:US20190372460A1

    公开(公告)日:2019-12-05

    申请号:US16407425

    申请日:2019-05-09

    Abstract: An electronic circuit includes a switched-mode power supply powering a first load via a first linear voltage regulator. The first regulator includes a transistor. The substrate and the gate of the transistor are capable of being coupled to a node of application of a power supply voltage. A method of operating the circuit is also disclosed.

    Electronic switching device with reduction of leakage currents and corresponding control method

    公开(公告)号:US10230363B2

    公开(公告)日:2019-03-12

    申请号:US15490356

    申请日:2017-04-18

    Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.

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