SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20230157003A1

    公开(公告)日:2023-05-18

    申请号:US17828298

    申请日:2022-05-31

    CPC classification number: H01L27/10805 H01L27/10873 H01L27/10897

    Abstract: A semiconductor memory device including a stack structure including layer groups that are vertically stacked on a substrate and including a word line, a channel layer, and a data storage element that is electrically connected to the channel layer; and a vertically extending bit line on one side of the stack structure, wherein the word line of each of the layer groups extends in a first direction parallel to a top surface of the substrate, the layer groups include first and second layer groups that are sequentially stacked, the channel layer is below the word line of the first layer group, the channel layer is above the word line of the second layer group, and the bit line includes a first protrusion portion connected to the channel layer of the first layer group; and a second protrusion portion connected to the channel layer of the second layer group.

    SEMICONDUCTOR MEMORY DEVICES
    13.
    发明申请

    公开(公告)号:US20220367479A1

    公开(公告)日:2022-11-17

    申请号:US17716215

    申请日:2022-04-08

    Abstract: A semiconductor memory device includes a semiconductor substrate a gate structure extending in a vertical direction on the semiconductor device, a plurality of charge trap layers spaced apart from each other in the vertical direction and each having a horizontal cross-section with a first ring shape surrounding the gate structure, a plurality of semiconductor patterns spaced apart from each other in the vertical direction and each having a horizontal cross-section with a second ring shape surrounding the plurality of charge trap layers, a source region and a source line at one end of each of the plurality of semiconductor patterns in a horizontal direction, and a drain region and a drain line at an other end of each of the plurality of semiconductor patterns in the horizontal direction. The gate structure may include a gate insulation layer and a gate electrode layer.

    SEMICONDUCTOR MEMORY DEVICE
    14.
    发明申请

    公开(公告)号:US20220352170A1

    公开(公告)日:2022-11-03

    申请号:US17725069

    申请日:2022-04-20

    Abstract: A semiconductor memory device includes a word line extending in a vertical direction, a semiconductor pattern having a ring-shaped horizontal cross-section that extends around the word line, a bit line disposed at a first end of the semiconductor pattern, and a capacitor structure disposed at second end of the semiconductor pattern. The capacitor structure includes a lower electrode layer electrically connected to the second end of the semiconductor pattern, having a ring-shaped horizontal cross-section, and including a connector extending in the vertical direction. A first segment extends in a horizontal direction from an upper end of the connector, and a second segment extends in the horizontal direction from a lower end of the connector. An upper electrode layer surrounded by the lower electrode layer, extends in the vertical direction, and a capacitor dielectric layer is between the lower electrode layer and the upper electrode layer.

    SEMICONDUCTOR MEMORY DEVICE
    15.
    发明申请

    公开(公告)号:US20220216239A1

    公开(公告)日:2022-07-07

    申请号:US17503713

    申请日:2021-10-18

    Abstract: A semiconductor memory device is disclosed. The semiconductor memory device may include a data storage layer including data storage devices, an interconnection layer disposed on the data storage layer, and a selection element layer provided between the data storage layer and the interconnection layer. The interconnection layer may include bit lines extending in a first direction. The selection element layer may include a cell transistor connected between one of the data storage devices and one of the bit lines, and the cell transistor may include an active pattern and a word line, which crosses the active pattern and is extended in a second direction crossing the first direction.

    CORDLESS VACUUM CLEANER ADOPTING OVERHEATING PROTECTION METHOD

    公开(公告)号:US20240415354A1

    公开(公告)日:2024-12-19

    申请号:US18818675

    申请日:2024-08-29

    Abstract: A cordless vacuum cleaner includes a cleaner main body and a station. The cleaner main body includes a battery and a first processor controlling performing a cleaning function using power of the battery. The station includes a power conversion device to generate a voltage to charge the battery of the cleaner main body, a second charge terminal to charge the battery of the cleaner main body with the voltage generated by the power conversion device, a temperature sensor installed within a distance from the second charge terminal and to detect a temperature of the second charge terminal, a divider resistor to provide a voltage by dividing of an input voltage with the temperature sensor, and a second processor controlling performing an overheating prevention operation based on a voltage level of the voltage provided by the divider resistor and the temperature sensor being greater than a threshold voltage level.

    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

    公开(公告)号:US20230049653A1

    公开(公告)日:2023-02-16

    申请号:US17722672

    申请日:2022-04-18

    Abstract: A semiconductor device including a substrate including a cell array region and a connection region, an electrode structure stacked on the substrate, each of the electrodes including a line portion on the cell array region and a pad portion on the connection region, Vertical patterns penetrating the electrode structure, a cell contact on the connection region and connected to the pad portion, an insulating pillar below the cell contact, with the pad portion interposed therebetween may be provided. The pad portion may include a first portion having a top surface higher than the line portion, and a second portion including a first protruding portion, the first protruding portion extending from the first portion toward the substrate and covering a top surface of the insulating pillar.

    METHOD AND DEVICE FOR CONTROLLING TRANSMISSION POWER OF TERMINAL IN BEAMFORMING SYSTEM

    公开(公告)号:US20220030527A1

    公开(公告)日:2022-01-27

    申请号:US17496386

    申请日:2021-10-07

    Abstract: The present disclosure relates to a communication technique for convergence of a 5G communication system for supporting a higher data transmission rate beyond a 4G system with an foT technology, and a system therefor. The present disclosure may be applied to an intelligent service (for example, smart home, smart building, smart city, smart car or connected car, health care, digital education, retail business, security and safety-related service, etc.) on the basis of a 5G communication technology and an IoT-related technology. The present invention relates to a method for controlling power of a terminal in a beamforming system and, specifically, provides a method for supporting control of uplink power of a terminal according to a beam change.

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