RECEIVING APPARATUS AND DECODING METHOD THEREOF

    公开(公告)号:US20190386777A1

    公开(公告)日:2019-12-19

    申请号:US16555477

    申请日:2019-08-29

    Abstract: A receiving apparatus includes: a first decoder configured to decode a signal transmitted through a first layer from a layered division multiplexing (LDM) signal using a parity check matrix to generate low density parity check (LDPC) information word bits and parity bits; an encoder configured to encode the LDPC information word bits, generated by decoding the signal transmitted through the first layer, using the parity check matrix to generate parity bits corresponding only to preset columns in the parity check matrix; and a second decoder configured to decode a signal obtained by removing, from the LDM signal, a signal corresponding to the LDPC information word bits generated by decoding the signal transmitted through the first layer, the parity bits generated by the encoder, and the parity bits generated by the first decoder except the parity bits generated by the encoder, thereby to generate information word bits transmitted through a second layer.

    Receiving apparatus and control method thereof

    公开(公告)号:US10021447B2

    公开(公告)日:2018-07-10

    申请号:US15217220

    申请日:2016-07-22

    Abstract: A receiving apparatus is provided. The receiving apparatus includes: a receiver configured to receive an input signal including a transmission frame which includes a bootstrap, a preamble, and a payload; a bootstrap detector configured to detect the bootstrap based on a correlation between the input signal and a reference signal which is pre-stored; and a signal processor configured to signal-process the preamble based on the detected bootstrap and signal-process the payload based on the signal-processed preamble, and the bootstrap detector is configured to determine the correlation by quantizing at least one of the input signal and the reference signal and then multiplexing the input signal and the reference signal at least one of which is quantized. Accordingly, an area occupied by hardware and cost can be reduced and loss of performance can be minimized.

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