公开(公告)号：US10923175B2

公开(公告)日：2021-02-16

申请号：US16230185

申请日：2018-12-21

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Dae-Sik Moon ,  Gil-Hoon Cha ,  Ki-Seok Oh ,  Chang-Kyo Lee ,  Yeon-Kyu Choi ,  Jung-Hwan Choi ,  Kyung-Soo Ha ,  Seok-Hun Hyun

IPC分类号： G11C11/40 ,  G11C11/4076 ,  G11C11/409 ,  G06F3/06 ,  G11C7/22

摘要： A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.