公开(公告)号：US20170004774A1

公开(公告)日：2017-01-05

申请号：US15255528

申请日：2016-09-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Masayuki KUMETA ,  Takeshi OKUNO ,  Eiji KANDA ,  Ryo ISHII ,  Naoaki KOMIYA

IPC: G09G3/3258 ,  G09G3/3291 ,  G09G3/20

CPC classification number: G09G3/3258 ,  G09G3/2007 ,  G09G3/3233 ,  G09G3/3291 ,  G09G2300/043 ,  G09G2300/0809 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0262 ,  G09G2320/045

Abstract: A pixel includes five transistors and a capacitor. A first transistor controls current to be supplied to a light-emitting element. A second transistor is connected between a gate electrode of the first transistor and a first power supply. A third transistor is connected between the gate electrode of the first transistor and a second terminal of the first transistor. The capacitor is coupled between the third transistor and the second terminal of the first transistor. The fourth transistor is connected between the second terminal of the first transistor and a second power supply. The fifth transistor is connected between the second terminal of the third transistor and a signal line. The capacitor may be the only capacitor in the pixel, and the signal line may receive an initialization voltage and a gray scale data voltage.

Abstract translation: 像素包括五个晶体管和一个电容器。 第一晶体管控制提供给发光元件的电流。 第二晶体管连接在第一晶体管的栅电极和第一电源之间。 第三晶体管连接在第一晶体管的栅电极和第一晶体管的第二端之间。 电容器耦合在第三晶体管和第一晶体管的第二端子之间。 第四晶体管连接在第一晶体管的第二端和第二电源之间。 第五晶体管连接在第三晶体管的第二端和信号线之间。 电容器可以是像素中的唯一电容器，信号线可以接收初始化电压和灰度数据电压。

公开(公告)号：US20150187252A1

公开(公告)日：2015-07-02

申请号：US14579070

申请日：2014-12-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ryo ISHII ,  Daisuke KAWAE

IPC: G09G3/20 ,  G09G3/32

CPC classification number: G09G3/3233 ,  G09G3/2022 ,  G09G2310/0216

Abstract: A display apparatus includes a scan line driving circuit and a data line driving circuit. The scan line driving circuit supplies a scan signal to exclusively select scan lines in each of a plurality of horizontal periods. The data line driving circuit provides the data lines with data signals for turning on or off associated pixel circuits. An image on a display screen for displaying a plurality of gray scale values is displayed by switching the pixel circuits to an on state or an off state in each of a plurality of sub-frames in one frame. A pulse width of the sub-frame is set by one or more of the horizontal periods. The number of horizontal periods of a pulse width of each of the sub-frames is set such that a remainder is 1 horizontal period when a number of horizontal periods is divided by a number of the sub-frames.

Abstract translation: 显示装置包括扫描线驱动电路和数据线驱动电路。 扫描线驱动电路提供扫描信号以在多个水平周期中的每一个中专门选择扫描线。 数据线驱动电路为数据线提供用于打开或关闭相关像素电路的数据信号。 通过在一帧中的多个子帧的每一个中将像素电路切换到接通状态或断开状态来显示用于显示多个灰度值的显示屏幕上的图像。 子帧的脉冲宽度由一个或多个水平周期设定。 每个子帧的脉冲宽度的水平周期的数量被设置为当多个水平周期被子帧的数量除以时，余数为1个水平周期。

公开(公告)号：US20150154941A1

公开(公告)日：2015-06-04

申请号：US14095469

申请日：2013-12-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Eiji KANDA ,  Masayuki KUMETA ,  Ryo ISHII ,  Takeshi OKUNO ,  Naoaki KOMIYA

IPC: G09G5/18 ,  G09G3/32

CPC classification number: G09G5/18 ,  G09G3/3233 ,  G09G3/3258 ,  G09G2300/043 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2310/0251 ,  G09G2320/0233

Abstract: A driving method of an electro-optic device includes initializing a gate voltage of a driving transistor; and performing a data write operation where a threshold voltage of the driving transistor is compensated by turning on a first transistor and a second transistor connected in series between a drain and a gate of the driving transistor and a voltage is provided to a capacity element connected to the gate of the driving transistor to hold a voltage of the compensated data signal as a gate voltage. The first transistor is at a drain side of the driving transistor and the second transistor is between the first transistor and a gate side of the driving transistor. When the data write operation ends, the second transistor is first turned off and, subsequently, the first transistor is turned off. The second transistor is again turned on after the first transistor is turned off.

Abstract translation: 电光器件的驱动方法包括：初始化驱动晶体管的栅极电压; 并且通过接通驱动晶体管的漏极和栅极之间串联连接的第一晶体管和第二晶体管来补偿驱动晶体管的阈值电压的数据写入操作，并且将电压提供给连接到驱动晶体管的电容元件 驱动晶体管的栅极将补偿的数据信号的电压保持为栅极电压。 第一晶体管位于驱动晶体管的漏极侧，第二晶体管位于第一晶体管和驱动晶体管的栅极侧之间。 当数据写入操作结束时，首先关闭第二晶体管，随后关闭第一晶体管。 在第一晶体管关闭之后，第二晶体管再次导通。

公开(公告)号：US20150061537A1

公开(公告)日：2015-03-05

申请号：US14471277

申请日：2014-08-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Eiji KANDA ,  Takeshi OKUNO ,  Masayuki KUMETA ,  Daisuke KAWAE ,  Ryo ISHII ,  Naoaki KOMIYA

IPC: H05B33/08

CPC classification number: G09G3/00 ,  G09G3/003 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2300/0876 ,  Y02B20/36

Abstract: An optoelectronic device includes a driving transistor, a correction transistor, and a control circuit. The driving transistor adjusts a first current from a power supply based on a voltage stored in a first capacitor. The driving transistor supplies the adjusted first current to the light-emitting element. The correction transistor is electrically connected on a path of a second current flowing from the power supply to the first capacitor, and adjusts the second current based on a voltage stored in a second capacitor. The control circuit controls the second capacitor to store a gray scale voltage while the first current flows, and controls flow of the second current to update the voltage stored in the first capacitor while the first current is blocked.

Abstract translation: 光电子器件包括驱动晶体管，校正晶体管和控制电路。 驱动晶体管基于存储在第一电容器中的电压来调节来自电源的第一电流。 驱动晶体管将经调整的第一电流提供给发光元件。 校正晶体管在从电源流向第一电容器的第二电流的路径上电连接，并且基于存储在第二电容器中的电压来调整第二电流。 当第一电流流动时，控制电路控制第二电容器存储灰度电压，并且控制第二电流的流动，以在第一电流被阻塞时更新存储在第一电容器中的电压。

公开(公告)号：US20150049103A1

公开(公告)日：2015-02-19

申请号：US14526692

申请日：2014-10-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Masayuki KUMETA ,  Ryo ISHII ,  Kazuhiro MATSUMOTO ,  Shinji YAMASHITA ,  Ansu LEE

IPC: G09G5/39

CPC classification number: G09G5/39 ,  G09G3/20 ,  G09G5/005 ,  G09G2310/0224 ,  G09G2310/0235 ,  G09G2310/08 ,  G09G2360/12 ,  G09G2360/18

Abstract: A control circuit for a frame memory includes a divider, a frame memory, a read control circuit, and a write control circuit. The divider divides image data into subfield data according to a plurality of subfields, where the image data is provided in synchronization with a first synchronization signal and in a unit of a frame. The frame memory has a plurality of blocks to store the subfield data. The read control circuit sequentially reads the subfield data from the blocks in synchronization with a second synchronization signal. The write control circuit writes new data to a first block before data written in a second block is read, and after data written in the first block is read by the read control circuit. The second synchronization signal may have a same cycle as the first synchronization signal and may be delayed by a preset delay time.

Abstract translation: 用于帧存储器的控制电路包括分频器，帧存储器，读控制电路和写控制电路。 分配器根据多个子场将图像数据分割成子场数据，其中图像数据与第一同步信号同步地以帧为单位提供。 帧存储器具有存储子场数据的多个块。 读取控制电路与第二同步信号同步地从块中顺序地读取子场数据。 写入控制电路在读取写入第二块中的数据之前并且在读取控制电路读取写入第一块的数据之后，将新数据写入第一块。 第二同步信号可以具有与第一同步信号相同的周期，并且可以延迟预设的延迟时间。

公开(公告)号：US20150002558A1

公开(公告)日：2015-01-01

申请号：US14321002

申请日：2014-07-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Masayuki KUMETA ,  Takeshi OKUNO ,  Eiji KANDA ,  Ryo ISHII ,  Naoaki KOMIYA

IPC: G09G3/36 ,  G09G3/32

CPC classification number: G09G3/3258 ,  G09G3/2007 ,  G09G3/3233 ,  G09G3/3291 ,  G09G2300/043 ,  G09G2300/0809 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0262 ,  G09G2320/045

Abstract: A pixel includes five transistors and a capacitor. A first transistor controls current to be supplied to a light-emitting element. A second transistor is connected between a gate electrode of the first transistor and a first power supply. A third transistor is connected between the gate electrode of the first transistor and a second terminal of the first transistor. The capacitor is coupled between the third transistor and the second terminal of the first transistor. The fourth transistor is connected between the second terminal of the first transistor and a second power supply. The fifth transistor is connected between the second terminal of the third transistor and a signal line. The capacitor may be the only capacitor in the pixel, and the signal line may receive an initialization voltage and a gray scale data voltage.

Abstract translation: 像素包括五个晶体管和一个电容器。 第一晶体管控制提供给发光元件的电流。 第二晶体管连接在第一晶体管的栅电极和第一电源之间。 第三晶体管连接在第一晶体管的栅电极和第一晶体管的第二端之间。 电容器耦合在第三晶体管和第一晶体管的第二端子之间。 第四晶体管连接在第一晶体管的第二端和第二电源之间。 第五晶体管连接在第三晶体管的第二端和信号线之间。 电容器可以是像素中的唯一电容器，信号线可以接收初始化电压和灰度数据电压。

公开(公告)号：US20140049182A1

公开(公告)日：2014-02-20

申请号：US13966971

申请日：2013-08-14

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Daisuke KAWAE ,  Ryo ISHII ,  Naoaki KOMIYA

IPC: G09G3/32

CPC classification number: G09G3/3233 ,  G09G2300/0852 ,  G09G2300/0861

Abstract: A display device includes a pixel circuit that supplies current to a light emitting diode (LED) and a driver circuit. The pixel circuit includes a constant current circuit including a first transistor and a capacitor connected to a gate terminal of the first transistor, and a switch circuit including a second transistor. The driver circuit controls the pixel circuit such that the LED emits light by connecting the anode of the LED diode and the first power line under a non-light emission state of the LED, connecting the gate terminal of the first transistor and the anode after the anode is disconnected from the first power line, setting the gate terminal of the first transistor to a voltage corresponding to an amount of a supply current from the first power line, and after setting the gate terminal, switching a state of the LED into a light emission state.

Abstract translation: 显示装置包括将电流提供给发光二极管（LED）和驱动电路的像素电路。 像素电路包括恒流电路，包括第一晶体管和连接到第一晶体管的栅极端子的电容器，以及包括第二晶体管的开关电路。 驱动器电路控制像素电路，使得LED通过在LED的非发光状态下连接LED二极管的阳极和第一电力线来发光，在第一晶体管的栅极端子和阳极之后连接 阳极与第一电力线断开，将第一晶体管的栅极端子设定为与来自第一电力线的电源电流对应的电压，并且在设置栅极端子之后，将LED的状态切换为光 排放状态。

公开(公告)号：US20150364085A1

公开(公告)日：2015-12-17

申请号：US14733193

申请日：2015-06-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Eiji KANDA ,  Masayuki KUMETA ,  Ryo ISHII

IPC: G09G3/32

CPC classification number: G09G3/3233 ,  G09G3/3241 ,  G09G2300/0465 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2320/043

Abstract: A display circuit includes a plurality of pixel circuits and a shared compensation transistor. Each pixel circuit includes a driving transistor to control light emission of a light emitter. The compensation transistor is to compensate the threshold voltages of the driving transistors of the pixel circuits.

Abstract translation: 显示电路包括多个像素电路和共享补偿晶体管。 每个像素电路包括用于控制光发射器的发光的驱动晶体管。 补偿晶体管用于补偿像素电路的驱动晶体管的阈值电压。

公开(公告)号：US20150356942A1

公开(公告)日：2015-12-10

申请号：US14734423

申请日：2015-06-09

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Eiji KANDA ,  Takeshi OKUNO ,  Masayuki KUMETA ,  Daisuke KAWAE ,  Ryo ISHII

IPC: G09G3/36

CPC classification number: G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2330/021 ,  G09G2330/028

Abstract: A voltage control circuit of a display device includes a first power line, a second power line, a third power line, and a filter circuit. The second power line is connected to the first power line at a central portion of a predetermined area. The third power line is in the predetermined area. The filter circuit is between the second and third power lines, and includes at least one element having a larger resistance value per unit length than a resistance value per unit length of at least one of the second or third power lines.

Abstract translation: 显示装置的电压控制电路包括第一电力线，第二电力线，第三电力线和滤波电路。 第二电力线在预定区域的中心部分处连接到第一电力线。 第三电力线处于预定区域。 滤波器电路位于第二和第三电力线之间，并且包括至少一个元件，其每单位长度的电阻值大于第二或第三电力线中至少一个的单位长度的电阻值。

公开(公告)号：US20150054722A1

公开(公告)日：2015-02-26

申请号：US14468914

申请日：2014-08-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Eiji KANDA ,  Takeshi OKUNO ,  Masayuki KUMETA ,  Daisuke KAWAE ,  Ryo ISHII ,  Naoaki KOMIYA

IPC: G09G3/32

CPC classification number: G09G3/3233 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2320/0295 ,  G09G2320/045 ,  G09G2320/0673

Abstract: An optoelectronic device includes a first transistor, a second transistor, and a control circuit. The first transistor is electrically connected between a power supply and a light-emitting element, has a gate to receive a gray scale voltage, and supplies the light-emitting element with a driving current corresponding to the gray scale voltage. The second transistor has a gate electrically connected to an electrode of the light-emitting element and a source or drain electrically connected to a circuit including a voltmeter. The control circuit reads a measurement value of the voltmeter when the gate of the first transistor receives the gray scale voltage, and corrects a next gray scale voltage applied to the gate of the first transistor based on the measurement value.

Abstract translation: 光电子器件包括第一晶体管，第二晶体管和控制电路。 第一晶体管电连接在电源和发光元件之间，具有接收灰度电压的栅极，并且向发光元件提供与灰度电压对应的驱动电流。 第二晶体管具有电连接到发光元件的电极的栅极以及电连接到包括电压表的电路的源极或漏极。 当第一晶体管的栅极接收到灰度电压时，控制电路读取电压表的测量值，并且基于测量值来校正施加到第一晶体管的栅极的下一个灰度级电压。