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公开(公告)号:US20180315864A1
公开(公告)日:2018-11-01
申请号:US15583289
申请日:2017-05-01
Applicant: QUALCOMM Incorporated
Inventor: Xia LI , Fabio Alessio MARINO , Qingqing LIANG , Francesco CAROBOLANTE , Seung Hyuk KANG
CPC classification number: H01L29/93 , H01L29/0649 , H01L29/36 , H01L29/66174 , H01L29/94
Abstract: Certain aspects of the present disclosure generally relate to a semiconductor variable capacitor, and techniques for fabricating the same, implemented using a threshold voltage implant region. For example, the semiconductor variable capacitor generally includes a first non-insulative region disposed above a first semiconductor region, a second non-insulative region disposed above the first semiconductor region, and a threshold voltage (Vt) implant region interposed between the first non-insulative region and the first semiconductor region and disposed adjacent to the second non-insulative region. In certain aspects, the semiconductor variable capacitor also includes a control region disposed above the first semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region.
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公开(公告)号:US20180062001A1
公开(公告)日:2018-03-01
申请号:US15250493
申请日:2016-08-29
Applicant: QUALCOMM Incorporated
Inventor: Francesco CAROBOLANTE , Fabio Alessio MARINO
CPC classification number: H01L29/93 , H01L24/08 , H01L27/0808 , H01L29/0649 , H01L29/66174 , H01L29/66189
Abstract: Certain aspects of the present disclosure provide a semiconductor variable capacitor based on a buried oxide process. The semiconductor variable capacitor generally includes a first conductive pad coupled to a first non-insulative region and a second conductive pad coupled to a second non-insulative region. The second non-insulative region may be coupled to a semiconductor region. The capacitor may also include a first control region coupled to the first semiconductor region such that a capacitance between the first conductive pad and the second conductive pad is configured to be adjusted by varying a control voltage applied to the first control region. The capacitor also includes an insulator region disposed below the semiconductor region, wherein at least a portion of the first non-insulative region is separated from the second non-insulative region by the insulator region such that the first conductive pad is electrically isolated from the second conductive pad.
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公开(公告)号:US20190221677A1
公开(公告)日:2019-07-18
申请号:US15871638
申请日:2018-01-15
Applicant: QUALCOMM Incorporated
Inventor: Fabio Alessio MARINO , Narasimhulu KANIKE , Francesco CAROBOLANTE , Paolo MENEGOLI , Qingqing LIANG
CPC classification number: H01L29/94 , H01G7/06 , H01L29/165 , H01L29/36 , H01L29/66189 , H01L29/93
Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, an insulative layer, and a first non-insulative region, the insulative layer being disposed between the semiconductor region and the first non-insulative region. In certain aspects, the semiconductor variable capacitor may also include a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, the second non-insulative region and the third non-insulative region having different doping types. In certain aspects, the semiconductor variable capacitor may also include an implant region disposed between the semiconductor region and the insulative layer. The implant region may be used to adjust the flat-band voltage of the semiconductor variable capacitor.
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公开(公告)号:US20190006530A1
公开(公告)日:2019-01-03
申请号:US15637924
申请日:2017-06-29
Applicant: QUALCOMM Incorporated
Inventor: Fabio Alessio MARINO , Paolo MENEGOLI , Narasimhulu KANIKE , Qingqing LIANG , Francesco CAROBOLANTE
Abstract: Certain aspects of the present disclosure provide a variable capacitor. The variable capacitor generally includes a semiconductor region, a dielectric layer disposed adjacent to the semiconductor region, and a first non-insulative region disposed above the dielectric layer, and a second non-insulative region disposed adjacent to the semiconductor region. In certain aspects, a doping concentration of the semiconductor region changes as a function of a distance across the semiconductor region from the dielectric layer or the second non-insulative region.
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15.
公开(公告)号:US20180374963A1
公开(公告)日:2018-12-27
申请号:US15706352
申请日:2017-09-15
Applicant: QUALCOMM Incorporated
Inventor: Fabio Alessio MARINO , Narasimhulu KANIKE , Qingqing LIANG , Francesco CAROBOLANTE , Paolo MENEGOLI
Abstract: Certain aspects of the present disclosure provide a semiconductor capacitor. The semiconductor capacitor generally includes an insulative layer, and a semiconductor region disposed adjacent to a first side of the insulative layer. The semiconductor capacitor also includes a first non-insulative region disposed adjacent to a second side of the insulative layer. In certain aspects, the semiconductor region may include a second non-insulative region, wherein the semiconductor region includes at least two regions having at least one of different doping concentrations or different doping types, and wherein one or more junctions between the at least two regions are disposed above or below the first non-insulative region.
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公开(公告)号:US20180233603A1
公开(公告)日:2018-08-16
申请号:US15431109
申请日:2017-02-13
Applicant: QUALCOMM Incorporated
Inventor: Fabio Alessio MARINO , Paolo MENEGOLI , Narasimhulu KANIKE , Francesco CAROBOLANTE
CPC classification number: H01L29/93 , H01G7/00 , H01L27/0808 , H01L29/0692 , H01L29/66174 , H01L29/66189 , H01L29/94
Abstract: Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a semiconductor region, an insulative layer disposed above the semiconductor region, and a first non-insulative region disposed above the insulative layer. In certain aspects, a second non-insulative region is disposed adjacent to the semiconductor region, and a control region is disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region. In certain aspects, the first non-insulative region is disposed above a first portion of the semiconductor region and a second portion of the semiconductor region, and the first portion and the second portion of the semiconductor region are disposed adjacent to a first side and a second side, respectively, of the control region or the second non-insulative region.
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