公开(公告)号：US10594530B2

公开(公告)日：2020-03-17

申请号：US15991759

申请日：2018-05-29

Applicant: QUALCOMM Incorporated

Inventor： Jifeng Geng ,  Feng Wang ,  Insung Kang

IPC: H04L27/26 ,  H04B1/04 ,  G01R23/16 ,  H04W24/02

Abstract: Methods, systems, and devices for wireless communications are described. The described methods, systems, and devices may include sampling an input signal to obtain one or more signal windows. An amplitude of a first sample within a first signal window of the one or more signal windows may be determined to exceed an amplitude threshold. A series of cancellation pulses may be combined with the first sample within the first signal window to obtain a reduced signal, the reduced signal including one or more reduced samples each having an amplitudes within the amplitude threshold. The series of cancellation pulses may be based on a characteristic of the first sample. The reduced signal may then be transmitted. The series of cancellation pulses may be based on, for example, an envelope of the first sample. In some cases, the series of cancellation pulses may be based on a phase of the first sample.

公开(公告)号：US20130229212A1

公开(公告)日：2013-09-05

申请号：US13866871

申请日：2013-04-19

Applicant: QUALCOMM INCORPORATED

Inventor： Jeremy D. Dunworth ,  Gary J. Ballantyne ,  Bhushan S. Asuri ,  Jifeng Geng ,  Gurkanwal S. Sahota

IPC: H03L7/08

CPC classification number: H03L7/08 ,  H03L7/093

Abstract: A method of performing modulation of a data signal at a phase-locked loop (PLL) includes generating, at an upper frequency port of the PLL, a digital loop signal based at least in part on the data signal. The method further includes differentiating the digital loop signal to generate a digital input signal and converting the digital input signal to an analog current signal. A first feedback signal is generated based on the analog current signal. The method further includes generating, at a lower frequency port of the PLL, a second feedback signal based on the first feedback signal and further based on the data signal. According to further embodiments, apparatuses and a computer-readable medium are disclosed.

Abstract translation: 在锁相环（PLL）处执行数据信号的调制的方法包括至少部分地基于数据信号在PLL的高频端口生成数字环路信号。 该方法还包括区分数字环路信号以产生数字输入信号并将数字输入信号转换为模拟电流信号。 基于模拟电流信号产生第一反馈信号。 该方法还包括在PLL的较低频率端口处产生基于第一反馈信号的第二反馈信号，并且还基于该数据信号。 根据另外的实施例，公开了装置和计算机可读介质。