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公开(公告)号：US20140269018A1
公开(公告)日：2014-09-18
申请号：US13799532
申请日：2013-03-13
Applicant: QUALCOMM INCORPORATED
Inventor： Peng Jin , Mohamed Hassan Abu-Rahma , Fahad Ahmed
IPC: G11C11/419
CPC classification number: G11C11/419 , G11C5/14 , G11C5/147 , G11C5/148
Abstract: A write-assisted memory includes a pre-charge assist circuit that assists the pre-charge of the power supply voltage on a power supply lead for an accessed memory cell in a bit-line-multiplexed group of memory cells subsequent to a write-assist period by coupling charge from the power supply leads for the remaining non-accessed memory cells in the bit-line-multiplexed group of memory cells.
Abstract translation: 写辅助存储器包括预充电辅助电路，其辅助在写辅助之后的位线复用组的存储器单元中的存取单元的电源引线上的电源电压的预充电 通过将来自电源引线的电荷耦合在位线复用组的存储器单元中的剩余的非存取存储器单元的周期。
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公开(公告)号：US09224453B2
公开(公告)日：2015-12-29
申请号：US13799532
申请日：2013-03-13
Applicant: QUALCOMM Incorporated
Inventor： Peng Jin , Mohamed Hassan Abu-Rahma , Fahad Ahmed
IPC: G11C11/419 , G11C5/14
CPC classification number: G11C11/419 , G11C5/14 , G11C5/147 , G11C5/148
Abstract: A write-assisted memory includes a pre-charge assist circuit that assists the pre-charge of the power supply voltage on a power supply lead for an accessed memory cell in a bit-line-multiplexed group of memory cells subsequent to a write-assist period by coupling charge from the power supply leads for the remaining non-accessed memory cells in the bit-line-multiplexed group of memory cells.
Abstract translation: 写辅助存储器包括预充电辅助电路，其辅助在写辅助之后的位线复用组的存储器单元中的存取单元的电源引线上的电源电压的预充电 通过将来自电源引线的电荷耦合到位线复用组的存储器单元中的剩余的非存取存储器单元。
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Patent Agency Ranking
公开(公告)号：US09019751B2
公开(公告)日：2015-04-28
申请号：US13781759
申请日：2013-03-01
Applicant: QUALCOMM Incorporated
Inventor： Peng Jin , Mohamed Hassan Abu-Rahma , Fahad Ahmed , Jaeyoon Kim
IPC: G11C5/00 , G05F3/02 , G11C7/00 , G11C5/14 , G11C11/419
CPC classification number: G05F3/02 , G11C5/14 , G11C7/00 , G11C11/419
Abstract: Various integrated circuits and methods of operating the integrated circuits are disclosed. The integrated circuit may include a circuit having one or more electrical parameters resulting from process variations during the manufacture of the integrated circuit, and a voltage source configured to supply a voltage to the circuit to power the circuit, wherein the voltage source is further configured to adjust the voltage as a function of the one or more electrical parameters.
Abstract translation: 公开了各种集成电路和操作集成电路的方法。 集成电路可以包括具有由集成电路制造期间的工艺变化而产生的一个或多个电参数的电路，以及被配置为向电路供应电压以为电路供电的电压源，其中电压源还被配置为 根据一个或多个电气参数调整电压。
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公开(公告)号：US20140269017A1
公开(公告)日：2014-09-18
申请号：US13799408
申请日：2013-03-13
Applicant: QUALCOMM INCORPORATED
Inventor： Fahad Ahmed , Mohamed Hassan Abu-Rahma , Peng Jin
IPC: G11C29/04 , G11C11/417
CPC classification number: H01L22/34 , G11C11/41 , G11C29/24 , G11C29/50 , G11C2029/0403 , G11C2029/5006
Abstract: An integrated circuit is disclosed. The integrated circuit includes a plurality of bit-cells arranged to store data. The integrated circuit also includes a sensor configured to generate an output for determining whether the bit-cells are operating at a process corner. The sensor comprises the same circuitry as the bit-cells.
Abstract translation: 公开了一种集成电路。 集成电路包括布置成存储数据的多个比特单元。 集成电路还包括被配置为生成用于确定位单元是否在过程角操作的输出的传感器。 传感器包括与位单元相同的电路。
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公开(公告)号：US10748641B2
公开(公告)日：2020-08-18
申请号：US15964050
申请日：2018-04-26
Applicant: QUALCOMM Incorporated
Inventor： Greg Seok , Fahad Ahmed , Chulmin Jung
Abstract: A method and apparatus for memory built-in self-test (MBIST) may be configured to load a testing program from an MBIST controller, execute the testing program, and determine and write pass/fail results to a read-out register. For example, in various embodiments, the testing program may comprise one or more write operations that are configured to change data stored in a plurality of memory bitcells from a first value to a second value while a byte enable signal is asserted in order to test stability associated with a memory bitcell, create DC and AC noise due to byte enable mode stress, check at-speed byte enable mode timing, and execute a self-checking algorithm that may be designed to verify whether data is received at a data input (Din) pin. Any memory bitcells storing a value different from an expected value after performing the write operation(s) may be identified as having failed the MBIST.
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公开(公告)号：US09373388B1
公开(公告)日：2016-06-21
申请号：US14699957
申请日：2015-04-29
Applicant: QUALCOMM Incorporated
Inventor： Fahad Ahmed , Chulmin Jung , Sei Seung Yoon
IPC: G11C11/00 , G11C11/419 , G11C7/12 , G11C7/06
CPC classification number: G11C11/419 , G11C7/062 , G11C7/065 , G11C7/08 , G11C7/12
Abstract: A sense amplifier is provided with a pair of first pull-up transistors that are configured to charge a corresponding pair of output terminals while a delayed sense enable signal is not asserted and to stop charging the corresponding pair of output terminals while the delayed sense enable signal is asserted.
Abstract translation: 读出放大器设置有一对第一上拉晶体管，其被配置为对相应的一对输出端子充电，同时延迟感测使能信号未被置位并且在延迟的感测使能信号的同时停止对相应的输出端子对的充电 被断言。
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公开(公告)号：US20140247652A1
公开(公告)日：2014-09-04
申请号：US13781759
申请日：2013-03-01
Applicant: QUALCOMM INCORPORATED
Inventor： Peng Jin , Mohamed Hassan Abu-Rahma , Fahad Ahmed , Jaeyoon Kim
CPC classification number: G05F3/02 , G11C5/14 , G11C7/00 , G11C11/419
Abstract: Various integrated circuits and methods of operating the integrated circuits are disclosed. The integrated circuit may include a circuit having one or more electrical parameters resulting from process variations during the manufacture of the integrated circuit, and a voltage source configured to supply a voltage to the circuit to power the circuit, wherein the voltage source is further configured to adjust the voltage as a function of the one or more electrical parameters.
Abstract translation: 公开了各种集成电路和操作集成电路的方法。 集成电路可以包括具有由集成电路制造期间的工艺变化而产生的一个或多个电参数的电路，以及被配置为向电路供应电压以为电路供电的电压源，其中电压源还被配置为 根据一个或多个电气参数调整电压。
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