Register comparison for operand store compare (OSC) prediction

    公开(公告)号:US09710281B2

    公开(公告)日:2017-07-18

    申请号:US14813796

    申请日:2015-07-30

    Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

    METHOD AND APPARATUS FOR ASSOCIATING INFORMATION

    公开(公告)号:US20170329774A1

    公开(公告)日:2017-11-16

    申请号:US15664800

    申请日:2017-07-31

    CPC classification number: G06F16/1873 G06F8/71

    Abstract: The present invention belongs to the information processing field and discloses a method and apparatus for associating information. The method for associating information comprises: obtaining identification information of a first content; associating the identification information of the first content with a second content, wherein the second content is created for the first content; obtaining identification information of a third content, wherein the third content is an updated version of the first content, the third content containing revision made according to the second content; and associating the identification information of the third content with the second content. With the method and system for associating information as provided by the present invention, contents of a plurality of versions can be managed and traced efficiently without a need to modify the existing code review flow.

    Register comparison for operand store compare (OSC) prediction

    公开(公告)号:US09760379B2

    公开(公告)日:2017-09-12

    申请号:US15275635

    申请日:2016-09-26

    Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

    REGISTER COMPARISON FOR OPERAND STORE COMPARE (OSC) PREDICTION
    14.
    发明申请
    REGISTER COMPARISON FOR OPERAND STORE COMPARE (OSC) PREDICTION 有权
    操作存储比较寄存器比较(OSC)预测

    公开(公告)号:US20170031687A1

    公开(公告)日:2017-02-02

    申请号:US14813796

    申请日:2015-07-30

    Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

    Abstract translation: 实施例涉及用于操作数存储比较(OSC)预测的寄存器比较的寄存器比较。 对于处理器流水线的指令组中的每个指令,方面包括:确定指令的基址寄存器值; 确定指令的索引寄存器值; 并确定指令的位移。 另一方面包括将指令组中的每个指令的基址寄存器值,索引寄存器值和位移与基址寄存器值,索引寄存器值以及指令组中所有其他指令的位移进行比较。 另一方面包括基于比较,确定指令组的加载指令与指令组的存储指令有可能的OSC冲突。 另一方面包括基于所确定的可能的OSC冲突延迟加载指令。

    Register comparison for operand store compare (OSC) prediction
    15.
    发明授权
    Register comparison for operand store compare (OSC) prediction 有权
    操作数存储比较(OSC)预测的寄存器比较

    公开(公告)号:US09524165B1

    公开(公告)日:2016-12-20

    申请号:US15132649

    申请日:2016-04-19

    Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

    Abstract translation: 实施例涉及用于操作数存储比较(OSC)预测的寄存器比较的寄存器比较。 对于处理器流水线的指令组中的每个指令,方面包括:确定指令的基址寄存器值; 确定指令的索引寄存器值; 并确定指令的位移。 另一方面包括将指令组中的每个指令的基址寄存器值,索引寄存器值和位移与基址寄存器值,索引寄存器值以及指令组中所有其他指令的位移进行比较。 另一方面包括基于比较,确定指令组的加载指令与指令组的存储指令有可能的OSC冲突。 另一方面包括基于所确定的可能的OSC冲突延迟加载指令。

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