公开(公告)号：US20170031688A1

公开(公告)日：2017-02-02

申请号：US15275635

申请日：2016-09-26

Applicant: International Business Machines Corporation

Inventor： David Hutton ,  Wen Li ,  Eric Schwarz

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/3867 ,  G06F9/30021 ,  G06F9/30043 ,  G06F9/30058 ,  G06F9/30079 ,  G06F9/30101 ,  G06F9/30145 ,  G06F9/3838

Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

公开(公告)号：US09760379B2

公开(公告)日：2017-09-12

申请号：US15275635

申请日：2016-09-26

Applicant: International Business Machines Corporation

Inventor： David Hutton ,  Wen Li ,  Eric Schwarz

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/3867 ,  G06F9/30021 ,  G06F9/30043 ,  G06F9/30058 ,  G06F9/30079 ,  G06F9/30101 ,  G06F9/30145 ,  G06F9/3838

Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

公开(公告)号：US20170031687A1

公开(公告)日：2017-02-02

申请号：US14813796

申请日：2015-07-30

Applicant: International Business Machines Corporation

Inventor： David Hutton ,  Wen Li ,  Eric Schwarz

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/3867 ,  G06F9/30021 ,  G06F9/30043 ,  G06F9/30058 ,  G06F9/30079 ,  G06F9/30101 ,  G06F9/30145 ,  G06F9/3838

Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

Abstract translation: 实施例涉及用于操作数存储比较（OSC）预测的寄存器比较的寄存器比较。 对于处理器流水线的指令组中的每个指令，方面包括：确定指令的基址寄存器值; 确定指令的索引寄存器值; 并确定指令的位移。 另一方面包括将指令组中的每个指令的基址寄存器值，索引寄存器值和位移与基址寄存器值，索引寄存器值以及指令组中所有其他指令的位移进行比较。 另一方面包括基于比较，确定指令组的加载指令与指令组的存储指令有可能的OSC冲突。 另一方面包括基于所确定的可能的OSC冲突延迟加载指令。

公开(公告)号：US09524165B1

公开(公告)日：2016-12-20

申请号：US15132649

申请日：2016-04-19

Applicant: International Business Machines Corporation

Inventor： David Hutton ,  Wen Li ,  Eric Schwarz

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/3867 ,  G06F9/30021 ,  G06F9/30043 ,  G06F9/30058 ,  G06F9/30079 ,  G06F9/30101 ,  G06F9/30145 ,  G06F9/3838

Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

Abstract translation: 实施例涉及用于操作数存储比较（OSC）预测的寄存器比较的寄存器比较。 对于处理器流水线的指令组中的每个指令，方面包括：确定指令的基址寄存器值; 确定指令的索引寄存器值; 并确定指令的位移。 另一方面包括将指令组中的每个指令的基址寄存器值，索引寄存器值和位移与基址寄存器值，索引寄存器值以及指令组中所有其他指令的位移进行比较。 另一方面包括基于比较，确定指令组的加载指令与指令组的存储指令有可能的OSC冲突。 另一方面包括基于所确定的可能的OSC冲突延迟加载指令。

公开(公告)号：US20170344381A1

公开(公告)日：2017-11-30

申请号：US15678519

申请日：2017-08-16

Applicant: International Business Machines Corporation

Inventor： David Hutton ,  Wen Li ,  Eric Schwarz

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/3867 ,  G06F9/30021 ,  G06F9/30043 ,  G06F9/30058 ,  G06F9/30079 ,  G06F9/30101 ,  G06F9/30145 ,  G06F9/3838

Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

公开(公告)号：US10013257B2

公开(公告)日：2018-07-03

申请号：US15678519

申请日：2017-08-16

Applicant: International Business Machines Corporation

Inventor： David Hutton ,  Wen Li ,  Eric Schwarz

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/3867 ,  G06F9/30021 ,  G06F9/30043 ,  G06F9/30058 ,  G06F9/30079 ,  G06F9/30101 ,  G06F9/30145 ,  G06F9/3838

Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.

公开(公告)号：US09710281B2

公开(公告)日：2017-07-18

申请号：US14813796

申请日：2015-07-30

Applicant: International Business Machines Corporation

Inventor： David Hutton ,  Wen Li ,  Eric Schwarz

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/3867 ,  G06F9/30021 ,  G06F9/30043 ,  G06F9/30058 ,  G06F9/30079 ,  G06F9/30101 ,  G06F9/30145 ,  G06F9/3838

Abstract: Embodiments relate to register comparison for register comparison for operand store compare (OSC) prediction. An aspect includes, for each instruction in an instruction group of a processor pipeline: determining a base register value of the instruction; determining an index register value of the instruction; and determining a displacement of the instruction. Another aspect includes comparing the base register value, index register value, and displacement of each instruction in the instruction group to the base register value, index register value, and displacement of all other instructions in the instruction group. Another aspect includes based on the comparison, determining that a load instruction of the instruction group has a probable OSC conflict with a store instruction of the instruction group. Yet another aspect includes delaying the load instruction based on the determined probable OSC conflict.