公开(公告)号：US12125847B2

公开(公告)日：2024-10-22

申请号：US17618897

申请日：2021-11-12

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： Qingyuan He ,  Ronghui Hao ,  Fu Chen ,  Jinhan Zhang ,  King Yuen Wong

IPC: H01L27/085 ,  H01L21/8252 ,  H01L23/522

CPC classification number: H01L27/085 ,  H01L21/8252 ,  H01L23/5221

Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first nitride-based transistor, and a second nitride-based transistor. The first nitride-based transistor applies the 2DEG region as a channel thereof and comprising a first drain electrode that makes contact with the second nitride-based semiconductor layer to form a first Schottky diode with the second nitride-based semiconductor layer. The second nitride-based transistor applies the 2DEG region as a channel thereof and includes a second drain electrode that makes contact with the second nitride-based semiconductor layer to form a second Schottky diode with the second nitride-based semiconductor layer, such that the first Schottky diode and the second Schottky diode are connected to the same node.

公开(公告)号：US10833159B1

公开(公告)日：2020-11-10

申请号：US16874653

申请日：2020-05-14

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： Ronghui Hao ,  King Yuen Wong

IPC: H01L29/10 ,  H01L29/205 ,  H01L29/20 ,  H01L29/778

Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer, a source, a drain, a gate structure, and a first p-type doped III-V compound/nitride semiconductor layer. The second semiconductor layer is disposed on the first semiconductor layer and has a bandgap greater than a bandgap of the first semiconductor layer. The source and the drain are disposed on the second semiconductor layer. The gate structure is disposed on the second semiconductor layer and between the source and the drain. The first p-type doped III-V/nitride semiconductor compound layer is disposed on the second semiconductor layer and between the gate structure and the drain with the drain at least partially covering the p-doped layer such that the first p-type doped III-V compound/nitride semiconductor layer and the drain are electrically coupled with each other.