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公开(公告)号:US09595980B2
公开(公告)日:2017-03-14
申请号:US14680838
申请日:2015-04-07
Inventor: Hui Dong Lee , Bong Hyuk Park , Moon-Sik Lee
CPC classification number: H04B1/0458 , H03B5/1212 , H03B5/1228 , H03B5/1243 , H03F3/24 , H04B2001/0408 , H04L25/0278
Abstract: Provided is an oscillation circuit including a voltage adjuster adjusting a magnitude of a power supply voltage according to a digital signal, an LC tank circuit connected between first and second nodes and generating a resonance signal on a basis of the magnitude adjusted power supply voltage, and a differential amplification circuit oscillating the resonance signal or modifying an oscillation state of the resonance signal to output first and second output voltage signals to the first and second nodes, respectively.
Abstract translation: 本发明提供一种振荡电路,其包括电压调节器,其根据数字信号调整电源电压的大小,连接在第一和第二节点之间的LC谐振电路,并且基于幅度调整的电源电压产生谐振信号;以及 差分放大电路振荡谐振信号或修改谐振信号的振荡状态,以将第一和第二输出电压信号分别输出到第一和第二节点。
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公开(公告)号:US09274151B2
公开(公告)日:2016-03-01
申请号:US13687200
申请日:2012-11-28
Inventor: Hui Dong Lee , Jae Ho Jung
IPC: G01R23/00
CPC classification number: G01R23/00 , G01R23/005
Abstract: A frequency comparator outputs an input reference signal and a comparison target signal as pulse-form signals, and is charged or discharged with a voltage corresponding to the reference signal to output a reference voltage having a variable first frequency range, and charged or discharged with a voltage corresponding to the comparison target signal to output a comparison target voltage having a variable second frequency range. The frequency comparator compares the reference voltage having the first frequency range and the comparison output voltage having the second frequency range.
Abstract translation: 频率比较器输出输入参考信号和比较目标信号作为脉冲形式的信号,并用对应于参考信号的电压进行充电或放电,以输出具有可变的第一频率范围的参考电压,并用 电压,以输出具有可变的第二频率范围的比较目标电压。 频率比较器比较具有第一频率范围的参考电压和具有第二频率范围的比较输出电压。
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公开(公告)号:US20230163733A1
公开(公告)日:2023-05-25
申请号:US17939648
申请日:2022-09-07
Inventor: Sunwoo KONG , Bong Hyuk Park , Hui Dong Lee , Seunghyun Jang , Seok Bong Hyun
IPC: H03F3/193
CPC classification number: H03F3/193 , H03F2200/451 , H03F2200/09 , H03F2200/21
Abstract: Disclosed is an ultra-high frequency amplifier which includes a first conductor connected to an amplifier input terminal to receive an RF signal applied to the amplifier input terminal, a second conductor parallel to a first portion of the first conductor, a third conductor separated from the second conductor and parallel to a second portion of the first conductor, and a transistor including a gate terminal connected to one end of the second conductor, a first terminal connected to one end of the third conductor, and a second terminal connected to an amplifier output terminal, wherein the first conductor and the second conductor form a first balun to output a first balance signal based on the RF signal, the first conductor and the third conductor form a second balun to output a second balance signal based on the RF signal.
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公开(公告)号:US11611400B2
公开(公告)日:2023-03-21
申请号:US17160631
申请日:2021-01-28
Inventor: Sunwoo Kong , Kwang Seon Kim , Jeehoon Park , Hui Dong Lee , Seunghyun Jang , Seok Bong Hyun
Abstract: An array antenna system, and a calibration method and apparatus thereof are provided. The calibration method includes measuring a signal loop including mutual coupling between antennas included in an array antenna, calculating a ratio of a reception (RX) signal received by each antenna to an RX signal received by a reference antenna of the array antenna based on a result of the measuring, and performing calibration of the array antenna based on the ratio.
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公开(公告)号:US11205998B2
公开(公告)日:2021-12-21
申请号:US16788177
申请日:2020-02-11
Inventor: Sun Woo Kong , Kwang Seon Kim , Jee Hoon Park , Kwang Chun Lee , Hui Dong Lee , Seung Hyun Jang
Abstract: An amplifier may comprise first and second matching networks; first and second transistors; and a transformer including first to third inductors. Also, a gate and a source of the first transistor are connected to the first matching network, one end of the first inductor is connected to a drain of the first transistor, the other end of the first inductor is connected to a source of the second transistor, one end of the second inductor is connected to a gate of the second transistor, the other end of the second inductor is grounded, one end of the third inductor is connected to a drain of the second transistor, and the other end of the third inductor is connected to the second matching network.
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公开(公告)号:US10547478B2
公开(公告)日:2020-01-28
申请号:US16226812
申请日:2018-12-20
Inventor: Seung Hyun Jang , Sun Woo Kong , Kwang Seon Kim , Myung Don Kim , Hui Dong Lee
IPC: H04L25/49 , H04B10/508 , H03M3/00
Abstract: Disclosed are a method for signal modulation based on pulse density modulation and an apparatus therefore. The method for signal modulation is performed in an apparatus for modulating a signal based on pulse density modulation and includes performing pulse density modulation on an analog signal input to the apparatus through a pulse density modulator of the apparatus, converting a bandwidth of the pulse density modulated signal into a bandwidth required for the apparatus through a correlative encoder of the apparatus, transmitting the bandwidth converted signal to a radio frequency (RF) unit of the apparatus based on an electrical-to-optical (E/O) converter and an optical-to-electrical (O/E) converter of the apparatus, filtering a frequency band of the bandwidth converted signal and outputting the frequency band filtered signal via the RF unit.
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公开(公告)号:US09083360B2
公开(公告)日:2015-07-14
申请号:US14036736
申请日:2013-09-25
Inventor: Hui Dong Lee , Kwang Chun Lee , Jae Ho Jung
CPC classification number: H03L7/095
Abstract: A lock detector and a clock generator including the same are disclosed. A lock detector includes a counter unit which counts a non-matching section of a first signal and a second signal to provide a count value, the first signal and the second signal being comparison result signals obtained by comparing a phase of a reference signal with a phase of a comparison signal, and a lock detection unit which outputs a lock detection signal based on a result of comparing the count value with the reference value. Accordingly, a lock state of the phase-locked loop can be detected rapidly and exactly.
Abstract translation: 公开了一种锁定检测器和包括该锁定检测器的时钟发生器。 锁定检测器包括对第一信号的非匹配部分进行计数的计数器单元和提供计数值的第二信号,第一信号和第二信号是通过将参考信号的相位与 比较信号的相位;以及锁定检测单元,其基于将计数值与参考值进行比较的结果来输出锁定检测信号。 因此,可以快速且精确地检测锁相环的锁定状态。
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